Change in coreboot[master]: soc/intel/alderlake: Add HID for DPTF Battery Participant

[Varshit B Pandya (Code Review)]

Attention is currently required from: Tim Wawrzynczak.
Varshit B Pandya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63316 )

Change subject: soc/intel/alderlake: Add HID for DPTF Battery Participant
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soc/intel/alderlake: Add HID for DPTF Battery Participant

BUG=b:205928013
TEST=Build, boot brya0 and dump SSDT to check BAT1 device HID

Signed-off-by: Varshit B Pandya 
Change-Id: Ie1fff53f938a5f13423e360c24c7181fa7613492
---
M src/soc/intel/alderlake/dptf.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/63316/1

diff --git a/src/soc/intel/alderlake/dptf.c b/src/soc/intel/alderlake/dptf.c
index 59243ba..7016d8c 100644
--- a/src/soc/intel/alderlake/dptf.c
+++ b/src/soc/intel/alderlake/dptf.c
@@ -14,6 +14,8 @@
    .tpch_device_hid = "INTC1049",
    /* _HID for the toplevel TPWR device, typically _SB.DPTF.TPWR */
    .tpwr_device_hid = "INTC1060",
+	/* _HID for the toplevel BAT1 device, typically _SB.DPTF.BAT1 */
+	.tbat_device_hid = "INTC1061",

.tpch_method_names = {
    	.set_fivr_low_clock_method = "RFC0",