Patch set updated for coreboot: 075fff6 rambi: Enable SCC devices in ACPI mode

[Aaron Durbin]

Aaron Durbin ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5018

-gerrit

commit 075fff6b5a8da18d6c2f866c99c8b4a6ac8ba73e
Author: Duncan Laurie 
Date:   Thu Dec 12 15:51:52 2013 -0800

rambi: Enable SCC devices in ACPI mode

With the ACPI GNVS exported and depthcharge changed to
    initialize eMMC in ACPI mode we can now put the SCC
    devices into ACPI mode.

BUG=chrome-os-partner:24380
    BRANCH=none
    TEST=build and boot on rambi, test eMMC and SD card

Change-Id: I39716198f8227c0c3293ac23eb09660792e2c51b
    Signed-off-by: Duncan Laurie 
    Reviewed-on: https://chromium-review.googlesource.com/179901
    Reviewed-by: Aaron Durbin 
    Signed-off-by: Aaron Durbin 
---
 src/mainboard/google/rambi/devicetree.cb | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mainboard/google/rambi/devicetree.cb b/src/mainboard/google/rambi/devicetree.cb
index bd54f00..bfb9e30 100644
--- a/src/mainboard/google/rambi/devicetree.cb
+++ b/src/mainboard/google/rambi/devicetree.cb
@@ -31,6 +31,9 @@ chip soc/intel/baytrail
    register "sdcard_cap_low" = "0x036864b2"
    register "sdcard_cap_high" = "0x0"

+	# Enable devices in ACPI mode
+	register "scc_acpi_mode" = "1"
+
    # Enable PIPEA as DP_C
    register "gpu_pipea_hotplug" = "6"		# 6ms Pulse
    register "gpu_pipea_port_select" = "2"		# DP_C