Hannah Williams (hannah.williams@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13175
-gerrit
commit 56270d2829708050be4952793492c81d7c09b834 Author: Kane Chen kane.chen@intel.com Date: Wed Dec 9 10:06:14 2015 +0800
intel/strago: Set LPC_CLKRUNB to PU_20K to solve leakage issue.
LPC_CLKRUNB pin needs to be set to PU_20K to prevent leakage
TEST=Test on Strago and make sure the leakage is gone
Signed-off-by: Kane Chen kane.chen@intel.com Change-Id: Id2bf7511806cdc52b505bb469238a9465b356352 Original-Reviewed-on: https://chromium-review.googlesource.com/317020 Original-Reviewed-by: Duncan Laurie dlaurie@chromium.org Original-Tested-by: Kane Chen kane.chen@intel.com Original-Commit-Queue: Kane Chen kane.chen@intel.com Signed-off-by: Hannah Williams hannah.williams@intel.com --- src/mainboard/intel/strago/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c index b64d867..3c8c8f5 100644 --- a/src/mainboard/intel/strago/gpio.c +++ b/src/mainboard/intel/strago/gpio.c @@ -48,7 +48,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = { NATIVE_PU20K(1), /* 34 SDMMC3_CMD */ NATIVE_PU20K(1), /* 35 SDMMC3_D0 */ NATIVE_PU20K(1), /* 45 MF_LPC_AD2 */ - Native_M1, /* 46 LPC_CLKRUNB */ + NATIVE_PU20K(1), /* 46 LPC_CLKRUNB */ NATIVE_PU20K(1), /* 47 MF_LPC_AD0 */ Native_M1, /* 48 LPC_FRAMEB */ Native_M1, /* 49 MF_LPC_CLKOUT1 */