Change in coreboot[master]: nb/intel/sandybridge: Run `read_mpr_training` before write training

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47611 )

Change subject: nb/intel/sandybridge: Run `read_mpr_training` before write training
......................................................................

nb/intel/sandybridge: Run `read_mpr_training` before write training

Reference code does this, so follow suit.

Tested on Asus P8H61-M PRO, still boots.

Change-Id: I21c5161da55b380dd4b2d574b22a1ef038f55fce
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/sandybridge/raminit_native.c
1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/47611/1

diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c
index e0b5a3d..ae9a4f4 100644
--- a/src/northbridge/intel/sandybridge/raminit_native.c
+++ b/src/northbridge/intel/sandybridge/raminit_native.c
@@ -684,16 +684,16 @@
    	if (err)
    		return err;

+		err = read_mpr_training(ctrl);
+		if (err)
+			return err;
+
    	err = write_training(ctrl);
    	if (err)
    		return err;

printram("CP5a\n");

-		err = read_mpr_training(ctrl);
-		if (err)
-			return err;
-
    	printram("CP5b\n");

err = command_training(ctrl);

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47611 )

Change subject: nb/intel/sandybridge: Run `read_mpr_training` before write training
......................................................................

Patch Set 1: Code-Review+2

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47611 )

Change subject: nb/intel/sandybridge: Run `read_mpr_training` before write training
......................................................................

nb/intel/sandybridge: Run `read_mpr_training` before write training

Reference code does this, so follow suit.

Tested on Asus P8H61-M PRO, still boots.

Change-Id: I21c5161da55b380dd4b2d574b22a1ef038f55fce
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47611
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
---
M src/northbridge/intel/sandybridge/raminit_native.c
1 file changed, 4 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c
index e0b5a3d..ae9a4f4 100644
--- a/src/northbridge/intel/sandybridge/raminit_native.c
+++ b/src/northbridge/intel/sandybridge/raminit_native.c
@@ -684,16 +684,16 @@
    	if (err)
    		return err;

+		err = read_mpr_training(ctrl);
+		if (err)
+			return err;
+
    	err = write_training(ctrl);
    	if (err)
    		return err;

printram("CP5a\n");

-		err = read_mpr_training(ctrl);
-		if (err)
-			return err;
-
    	printram("CP5b\n");

err = command_training(ctrl);