Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81093?usp=email )
Change subject: vc/amd/opensil/genoa_poc/memmap: use GiB define ......................................................................
vc/amd/opensil/genoa_poc/memmap: use GiB define
Use the GiB define to make the 4 GiB boundary used in some places in the code a bit easier to read.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I81877a5d293c883d2e31bdb18ae3b22b8a44e62f --- M src/vendorcode/amd/opensil/genoa_poc/memmap.c 1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/81093/1
diff --git a/src/vendorcode/amd/opensil/genoa_poc/memmap.c b/src/vendorcode/amd/opensil/genoa_poc/memmap.c index 31e6f04..b1d4b93 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/memmap.c +++ b/src/vendorcode/amd/opensil/genoa_poc/memmap.c @@ -115,7 +115,7 @@ reserved_ram_from_to(dev, (*idx)++, mem_usable, top_mem);
// Check if we're done - if (top_of_mem <= 0x100000000) + if (top_of_mem <= 4ULL * GiB) return;
// Holes in upper DRAM @@ -124,11 +124,11 @@ if (hole_info == NULL) return; uint64_t lowest_upper_hole_base = top_of_mem; - uint64_t highest_upper_hole_end = 0x100000000; + uint64_t highest_upper_hole_end = 4ULL * GiB; for (int hole = 0; hole < n_holes; hole++) { if (hole_info[hole].Type == MMIO) continue; - if (hole_info[hole].Base < 0x100000000) + if (hole_info[hole].Base < 4ULL * GiB) continue; lowest_upper_hole_base = MIN(lowest_upper_hole_base, hole_info[hole].Base); highest_upper_hole_end = MAX(highest_upper_hole_end, hole_info[hole].Base + hole_info[hole].Size); @@ -138,7 +138,7 @@ reserved_ram_range(dev, (*idx)++, hole_info[hole].Base, hole_info[hole].Size); }
- ram_from_to(dev, (*idx)++, 0x100000000, lowest_upper_hole_base); + ram_from_to(dev, (*idx)++, 4ULL * GiB, lowest_upper_hole_base);
// Do we need this? if (top_of_mem > highest_upper_hole_end)