Change in coreboot[master]: soc/amd/common/block/pm: remove POWER_STATE_DEFAULT_ON_AFTER_FAILURE

[Felix Held (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson.
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52300 )

Change subject: soc/amd/common/block/pm: remove POWER_STATE_DEFAULT_ON_AFTER_FAILURE
......................................................................

soc/amd/common/block/pm: remove POWER_STATE_DEFAULT_ON_AFTER_FAILURE

Not selecting POWER_STATE_DEFAULT_ON_AFTER_FAILURE brings Cezanne that
is currently the only SoC using this functionality in line with Picasso
where the default is that the board remains in power off mode after
power was lost and later restored. Boards can change this behavior by
selecting POWER_STATE_OFF_AFTER_FAILURE, POWER_STATE_ON_AFTER_FAILURE or
POWER_STATE_PREVIOUS_AFTER_FAILURE.

Signed-off-by: Felix Held 
Change-Id: Ic96f40e3c9867cd821e58d752f58b763930f6d0f
---
M src/soc/amd/common/block/pm/Kconfig
1 file changed, 0 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/52300/1

diff --git a/src/soc/amd/common/block/pm/Kconfig b/src/soc/amd/common/block/pm/Kconfig
index ebd1679..538301d 100644
--- a/src/soc/amd/common/block/pm/Kconfig
+++ b/src/soc/amd/common/block/pm/Kconfig
@@ -8,9 +8,6 @@

if SOC_AMD_COMMON_BLOCK_PM

-config POWER_STATE_DEFAULT_ON_AFTER_FAILURE
-	default y
-
 config SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE
    bool
    help