HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38957 )
Change subject: sb/intel/i82801{d,j}x/nvs: Rename register ......................................................................
sb/intel/i82801{d,j}x/nvs: Rename register
Rename register to match recent intel models.
Change-Id: Ibf0f684efdf311cafc0184609c65ecc893c8f63d Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/getac/p470/acpi/ec.asl M src/mainboard/getac/p470/acpi/thermal.asl M src/southbridge/intel/i82801dx/nvs.h M src/southbridge/intel/i82801jx/acpi/globalnvs.asl M src/southbridge/intel/i82801jx/nvs.h 5 files changed, 8 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/38957/1
diff --git a/src/mainboard/getac/p470/acpi/ec.asl b/src/mainboard/getac/p470/acpi/ec.asl index 6783289..2a551fa 100644 --- a/src/mainboard/getac/p470/acpi/ec.asl +++ b/src/mainboard/getac/p470/acpi/ec.asl @@ -54,7 +54,7 @@ CTMP, 8, // CPU Temperature Offset(0x15), CTRO, 8, // EC throttling on trip point - CRTT, 8, // Critical Shut-down Temperature + TCRT, 8, // Critical Shut-down Temperature Offset(0x17), BKLL, 8, // Backlight Level
diff --git a/src/mainboard/getac/p470/acpi/thermal.asl b/src/mainboard/getac/p470/acpi/thermal.asl index 6c9f2e9..bb51bb9 100644 --- a/src/mainboard/getac/p470/acpi/thermal.asl +++ b/src/mainboard/getac/p470/acpi/thermal.asl @@ -49,7 +49,7 @@ // Critical shutdown temperature Method (_CRT, 0, Serialized) { - Store(_SB.PCI0.LPCB.EC0.CRTT, Local0) + Store(_SB.PCI0.LPCB.EC0.TCRT, Local0) Store(DEGR(Local0), Local0) Return(Local0) } diff --git a/src/southbridge/intel/i82801dx/nvs.h b/src/southbridge/intel/i82801dx/nvs.h index 3a72f4d..8928c62 100644 --- a/src/southbridge/intel/i82801dx/nvs.h +++ b/src/southbridge/intel/i82801dx/nvs.h @@ -33,11 +33,11 @@ u8 dckn; /* 0x13 - PCIe docking state */ /* Thermal policy */ u8 actt; /* 0x14 - active trip point */ - u8 psvt; /* 0x15 - passive trip point */ + u8 tpsv; /* 0x15 - passive trip point */ u8 tc1v; /* 0x16 - passive trip point TC1 */ u8 tc2v; /* 0x17 - passive trip point TC2 */ u8 tspv; /* 0x18 - passive trip point TSP */ - u8 crtt; /* 0x19 - critical trip point */ + u8 tcrt; /* 0x19 - critical trip point */ u8 dtse; /* 0x1a - Digital Thermal Sensor enable */ u8 dts1; /* 0x1b - DT sensor 1 */ u8 dts2; /* 0x1c - DT sensor 2 */ diff --git a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl index 44aa8e4..c1be852 100644 --- a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl @@ -51,11 +51,11 @@ /* Thermal policy */ Offset (0x14), ACTT, 8, // 0x14 - active trip point - PSVT, 8, // 0x15 - passive trip point + TPSV, 8, // 0x15 - passive trip point TC1V, 8, // 0x16 - passive trip point TC1 TC2V, 8, // 0x17 - passive trip point TC2 TSPV, 8, // 0x18 - passive trip point TSP - CRTT, 8, // 0x19 - critical trip point + TCRT, 8, // 0x19 - critical trip point DTSE, 8, // 0x1a - Digital Thermal Sensor enable DTS1, 8, // 0x1b - DT sensor 1 FLVL, 8, // 0x1c - current fan level diff --git a/src/southbridge/intel/i82801jx/nvs.h b/src/southbridge/intel/i82801jx/nvs.h index 88944c0..c13ad70 100644 --- a/src/southbridge/intel/i82801jx/nvs.h +++ b/src/southbridge/intel/i82801jx/nvs.h @@ -35,11 +35,11 @@ u8 dckn; /* 0x13 - PCIe docking state */ /* Thermal policy */ u8 actt; /* 0x14 - active trip point */ - u8 psvt; /* 0x15 - passive trip point */ + u8 tpsv; /* 0x15 - passive trip point */ u8 tc1v; /* 0x16 - passive trip point TC1 */ u8 tc2v; /* 0x17 - passive trip point TC2 */ u8 tspv; /* 0x18 - passive trip point TSP */ - u8 crtt; /* 0x19 - critical trip point */ + u8 tcrt; /* 0x19 - critical trip point */ u8 dtse; /* 0x1a - Digital Thermal Sensor enable */ u8 dts1; /* 0x1b - DT sensor 1 */ u8 flvl; /* 0x1c - current fan level */
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38957 )
Change subject: sb/intel/i82801{d,j}x/nvs: Rename register ......................................................................
Patch Set 1: Code-Review+1
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/38957 )
Change subject: sb/intel/i82801{d,j}x/nvs: Rename register ......................................................................
Abandoned
too old
-
HAOUAS Elyes (Code Review) -
Paul Menzel (Code Review)