Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39538 )
Change subject: soc/intel/skylake: Configure ASPM and L1 substates for PCH root ports ......................................................................
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39538/12/src/soc/intel/skylake/chip... File src/soc/intel/skylake/chip.c:
https://review.coreboot.org/c/coreboot/+/39538/12/src/soc/intel/skylake/chip... PS12, Line 137: incorrectly inadvertently?