Change in coreboot[master]: soc/intel/tigerlake: Add code for early tcss

[Vijay P Hiremath (Code Review)]

Vijay P Hiremath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37870 )

Change subject: soc/intel/tigerlake: Add code for early tcss
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Patch Set 19:

(1 comment)

https://review.coreboot.org/c/coreboot/+/37870/19/src/soc/intel/tigerlake/ea... 
File src/soc/intel/tigerlake/early_tcss.c:

https://review.coreboot.org/c/coreboot/+/37870/19/src/soc/intel/tigerlake/ea... 
PS19, Line 71: 	/* send USB connect request */
             : 	tcss_req[0] = PMC_IPC_TCSS_CONN_REQ_RES | /* Usage */
             : 		mux_data.usb3_port << 4;
             : 	tcss_req[1] = mux_data.usb2_port |
             : 		mux_data.ufp << 4 |  /* 1=UFP/0=DFP */
             : 		mux_data.polarity << 5 | /* ORI-HSL */
             : 		mux_data.polarity << 6 | /* ORI-SBU */
             : 		mux_data.acc << 7;
             : 	req_size = 2;
             : 	printk(BIOS_DEBUG, "tcss_req[0]-> 0x%x\n"
             : 		"tcss_req[1]-> 0x%x\n\t", tcss_req[0], tcss_req[1]);
             : 
add a separate function,
connect
safe
alt_mode
easy to reuse between USB & DP