New patch to review for coreboot: rockchip/rk3399: Actually remove big CPU initialization from bootblock

[Patrick Georgi]

Patrick Georgi ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16769

-gerrit

commit d4b839eac35e49346f0375c3217fbe8aff20bc11
Author: Julius Werner 
Date:   Fri Sep 23 16:07:42 2016 -0700

rockchip/rk3399: Actually remove big CPU initialization from bootblock

CL:377541 was supposed to remove the big CPU cluster initialization from
    rkclk_init() in the bootblock and move it to a more suitable place in
    ramstage. Except that next to all the code cleanup I did in that patch,
    I seem to have forgotten to actually remove that old code.

Big thanks to Nico for spotting that in the upstream coreboot review.

BRANCH=gru
    BUG=chrome-os-partner:54906
    TEST=Booted Kevin.

Change-Id: I09fe948b4587536802b42329b813177439e0804f
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: 77f9eaf0446b22adfca79d0adf8a0ecfd93c0040
    Original-Change-Id: I13dab208225b7e43ad864f2f3cf51b3c104acd4b
    Original-Reported-by: Nico Huber 
    Original-Signed-off-by: Julius Werner 
    Original-Reviewed-on: https://chromium-review.googlesource.com/389236
    Original-Reviewed-by: Douglas Anderson 
---
 src/soc/rockchip/rk3399/clock.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/src/soc/rockchip/rk3399/clock.c b/src/soc/rockchip/rk3399/clock.c
index b9de844..2596853 100644
--- a/src/soc/rockchip/rk3399/clock.c
+++ b/src/soc/rockchip/rk3399/clock.c
@@ -411,13 +411,6 @@ void rkclk_init(void)
    rkclk_set_pll(&cru_ptr->gpll_con[0], &gpll_init_cfg);
    rkclk_set_pll(&cru_ptr->cpll_con[0], &cpll_init_cfg);

-	/*
-	 * coreboot boot from little core, but it seem if apll_b use defalut
-	 * 24MHz it will take a long time to enable big core, and will cause
-	 * a watchdog crash, so we should do apll_b initialization here
-	 */
-	rkclk_configure_cpu(APLL_600_MHZ, true);
-
    /* configure perihp aclk, hclk, pclk */
    aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
    assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);