[XS] Change in coreboot[main]: mb/google/brox: Generate RAM IDs for two modules

[Ivy Jian (Code Review)]

Attention is currently required from: Karthik Ramasubramanian, Paul Menzel.

Hello Karthik Ramasubramanian, Shelley Chen, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/79392?usp=email

to look at the new patch set (#5).

Change subject: mb/google/brox: Generate RAM IDs for two modules
......................................................................

mb/google/brox: Generate RAM IDs for two modules

Add the support LP5 RAM parts for brox:
1. HYNIX LPDDR5 6400 2GB H9JCNNNBK3MLYR-N6E
2. MICRON LPDDR5 6400 4GB MT62F1G32D4DR-031 WT:B

DRAM Part Name                  ID to assign
H9JCNNNBK3MLYR-N6E              0 (0000)
MT62F1G32D4DR-031 WT:B          1 (0001)

BUG=b:311450057
BRANCH=None
TEST=Run part_id_gen tool without any errors
Change-Id: Ib17f26a310435e37088191594863a645aa751440
Signed-off-by: Ivy Jian 
---
M src/mainboard/google/brox/variants/brox/memory/Makefile.inc
M src/mainboard/google/brox/variants/brox/memory/dram_id.generated.txt
M src/mainboard/google/brox/variants/brox/memory/mem_parts_used.txt
3 files changed, 6 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/79392/5