Change in coreboot[master]: mb/intel/adlrvp: Add support for DDR5 memory

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46485 )

Change subject: mb/intel/adlrvp: Add support for DDR5 memory
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Patch Set 7:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46485/7/src/mainboard/intel/adlrvp/... 
File src/mainboard/intel/adlrvp/variants/adlrvp_p/memory.c:

https://review.coreboot.org/c/coreboot/+/46485/7/src/mainboard/intel/adlrvp/... 
PS7, Line 62: 	.rcomp_targets = {50, 30, 30, 30, 27},
> It would be nice to provide const arrays for the recommended Rcomp target values in SoC code.

Sure Angel. Nice feedback. i believe you meant to make rcomp_resistor and rcomp_targets  both const?

https://github.com/coreboot/coreboot/blob/master/src/soc/intel/alderlake/inc...