HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32829
Change subject: southbridge: Use 'include <stdlib.h>' when appropriate ......................................................................
southbridge: Use 'include <stdlib.h>' when appropriate
Change-Id: I5728b44fdd680b21e951397a2390e24f9171ac34 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/amd/agesa/hudson/spi.c M src/southbridge/amd/amd8111/lpc.c M src/southbridge/intel/bd82x6x/me_status.c M src/southbridge/intel/common/smbus.c M src/southbridge/intel/fsp_rangeley/early_init.c M src/southbridge/intel/i82801ix/i82801ix.c M src/southbridge/intel/i82801jx/i82801jx.c M src/southbridge/intel/lynxpoint/me_status.c M src/southbridge/intel/lynxpoint/serialio.c M src/southbridge/nvidia/ck804/lpc.c M src/southbridge/nvidia/mcp55/lpc.c 11 files changed, 10 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/32829/1
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c index 9c546c5..fb9f7a1 100644 --- a/src/southbridge/amd/agesa/hudson/spi.c +++ b/src/southbridge/amd/agesa/hudson/spi.c @@ -12,8 +12,9 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + +#include <stddef.h> #include <stdint.h> -#include <stdlib.h> #include <device/mmio.h> #include <console/console.h> #include <spi_flash.h> @@ -21,7 +22,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> - #include <Proc/Fch/FchPlatform.h>
#define SPI_REG_OPCODE 0x0 diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c index c4a7896..11e852a 100644 --- a/src/southbridge/amd/amd8111/lpc.c +++ b/src/southbridge/amd/amd8111/lpc.c @@ -28,7 +28,6 @@ #include <arch/acpigen.h> #include <cpu/amd/powernow.h> #endif -#include <stdlib.h>
#include "amd8111.h"
diff --git a/src/southbridge/intel/bd82x6x/me_status.c b/src/southbridge/intel/bd82x6x/me_status.c index b202376..1225cb1 100644 --- a/src/southbridge/intel/bd82x6x/me_status.c +++ b/src/southbridge/intel/bd82x6x/me_status.c @@ -14,8 +14,8 @@ * GNU General Public License for more details. */
-#include <stdlib.h> #include <console/console.h> + #include "me.h"
#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) diff --git a/src/southbridge/intel/common/smbus.c b/src/southbridge/intel/common/smbus.c index af1eb60..6d901d6 100644 --- a/src/southbridge/intel/common/smbus.c +++ b/src/southbridge/intel/common/smbus.c @@ -18,12 +18,10 @@ #include <arch/io.h> #include <console/console.h> #include <device/smbus_def.h> -#include <stdlib.h> #include <types.h>
#include "smbus.h"
- #if CONFIG(DEBUG_SMBUS) #define dprintk(args...) printk(BIOS_DEBUG, ##args) #else diff --git a/src/southbridge/intel/fsp_rangeley/early_init.c b/src/southbridge/intel/fsp_rangeley/early_init.c index 32e3bb5..aade4db 100644 --- a/src/southbridge/intel/fsp_rangeley/early_init.c +++ b/src/southbridge/intel/fsp_rangeley/early_init.c @@ -16,7 +16,6 @@ */
#include <stdint.h> -#include <stdlib.h> #include <console/console.h> #include <arch/io.h> #include <device/mmio.h> @@ -24,6 +23,7 @@ #include <device/pci_def.h> #include <pc80/mc146818rtc.h> #include <version.h> + #include "pci_devs.h" #include "soc.h"
diff --git a/src/southbridge/intel/i82801ix/i82801ix.c b/src/southbridge/intel/i82801ix/i82801ix.c index 99078dc..aa81984 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.c +++ b/src/southbridge/intel/i82801ix/i82801ix.c @@ -16,12 +16,12 @@ * GNU General Public License for more details. */
-#include <stdlib.h> #include <arch/io.h> #include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <console/console.h> + #include "i82801ix.h"
typedef struct southbridge_intel_i82801ix_config config_t; diff --git a/src/southbridge/intel/i82801jx/i82801jx.c b/src/southbridge/intel/i82801jx/i82801jx.c index ec5576d..bf85f98 100644 --- a/src/southbridge/intel/i82801jx/i82801jx.c +++ b/src/southbridge/intel/i82801jx/i82801jx.c @@ -16,12 +16,12 @@ * GNU General Public License for more details. */
-#include <stdlib.h> #include <arch/io.h> #include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <console/console.h> + #include "i82801jx.h"
typedef struct southbridge_intel_i82801jx_config config_t; diff --git a/src/southbridge/intel/lynxpoint/me_status.c b/src/southbridge/intel/lynxpoint/me_status.c index 9ca5552..d1ece5a 100644 --- a/src/southbridge/intel/lynxpoint/me_status.c +++ b/src/southbridge/intel/lynxpoint/me_status.c @@ -14,8 +14,8 @@ * GNU General Public License for more details. */
-#include <stdlib.h> #include <console/console.h> + #include "me.h"
#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c index 23d8125..1557c8d 100644 --- a/src/southbridge/intel/lynxpoint/serialio.c +++ b/src/southbridge/intel/lynxpoint/serialio.c @@ -21,7 +21,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> + #include "pch.h" #include "nvs.h"
diff --git a/src/southbridge/nvidia/ck804/lpc.c b/src/southbridge/nvidia/ck804/lpc.c index 2123554..cbf5320 100644 --- a/src/southbridge/nvidia/ck804/lpc.c +++ b/src/southbridge/nvidia/ck804/lpc.c @@ -29,9 +29,9 @@ #include <arch/ioapic.h> #include <arch/acpi.h> #include <cpu/x86/lapic.h> -#include <stdlib.h> #include <assert.h> #include <cpu/amd/powernow.h> + #include "chip.h"
#define NMI_OFF 0 diff --git a/src/southbridge/nvidia/mcp55/lpc.c b/src/southbridge/nvidia/mcp55/lpc.c index 1aef631..b80a524 100644 --- a/src/southbridge/nvidia/mcp55/lpc.c +++ b/src/southbridge/nvidia/mcp55/lpc.c @@ -31,8 +31,8 @@ #include <arch/ioapic.h> #include <cpu/x86/lapic.h> #include <arch/acpi.h> -#include <stdlib.h> #include <cpu/amd/powernow.h> + #include "mcp55.h"
#define NMI_OFF 0
Hello Patrick Rudolph, build bot (Jenkins), David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32829
to look at the new patch set (#3).
Change subject: southbridge: Use 'include <stdlib.h>' when appropriate ......................................................................
southbridge: Use 'include <stdlib.h>' when appropriate
Also, including <types.h>, is supposed to provide stdint and stddef.
Change-Id: I5728b44fdd680b21e951397a2390e24f9171ac34 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/amd/agesa/hudson/spi.c M src/southbridge/amd/amd8111/lpc.c M src/southbridge/intel/bd82x6x/me_status.c M src/southbridge/intel/common/smbus.c M src/southbridge/intel/fsp_rangeley/early_init.c M src/southbridge/intel/i82801ix/i82801ix.c M src/southbridge/intel/i82801jx/i82801jx.c M src/southbridge/intel/lynxpoint/me_status.c M src/southbridge/intel/lynxpoint/serialio.c M src/southbridge/nvidia/ck804/lpc.c M src/southbridge/nvidia/mcp55/lpc.c 11 files changed, 10 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/32829/3
Hello Patrick Rudolph, build bot (Jenkins), David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32829
to look at the new patch set (#4).
Change subject: southbridge: Use 'include <stdlib.h>' when appropriate ......................................................................
southbridge: Use 'include <stdlib.h>' when appropriate
Change-Id: I5728b44fdd680b21e951397a2390e24f9171ac34 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/amd/agesa/hudson/spi.c M src/southbridge/intel/bd82x6x/me_status.c M src/southbridge/intel/common/smbus.c M src/southbridge/intel/lynxpoint/me_status.c 4 files changed, 4 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/32829/4
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32829 )
Change subject: southbridge: Use 'include <stdlib.h>' when appropriate ......................................................................
Abandoned
see 32023
HAOUAS Elyes has restored this change. ( https://review.coreboot.org/c/coreboot/+/32829 )
Change subject: southbridge: Use 'include <stdlib.h>' when appropriate ......................................................................
Restored
Hello Patrick Rudolph, build bot (Jenkins), David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32829
to look at the new patch set (#5).
Change subject: src/southbridge: Remove unused <stdlib.h> ......................................................................
src/southbridge: Remove unused <stdlib.h>
Change-Id: I5728b44fdd680b21e951397a2390e24f9171ac34 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/amd/agesa/hudson/spi.c M src/southbridge/intel/bd82x6x/me_status.c M src/southbridge/intel/common/smbus.c M src/southbridge/intel/i82801ix/i82801ix.c M src/southbridge/intel/i82801jx/i82801jx.c M src/southbridge/intel/lynxpoint/me_status.c M src/southbridge/intel/lynxpoint/serialio.c 7 files changed, 0 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/32829/5
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32829 )
Change subject: src/southbridge: Remove unused <stdlib.h> ......................................................................
Patch Set 9: Code-Review+2
Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/32829 )
Change subject: src/southbridge: Remove unused <stdlib.h> ......................................................................
src/southbridge: Remove unused <stdlib.h>
Change-Id: I5728b44fdd680b21e951397a2390e24f9171ac34 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/32829 Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/southbridge/amd/agesa/hudson/spi.c M src/southbridge/intel/bd82x6x/me_status.c M src/southbridge/intel/common/smbus.c M src/southbridge/intel/i82801ix/i82801ix.c M src/southbridge/intel/i82801jx/i82801jx.c M src/southbridge/intel/lynxpoint/me_status.c M src/southbridge/intel/lynxpoint/serialio.c 7 files changed, 0 insertions(+), 7 deletions(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c index 9c546c5..9656027 100644 --- a/src/southbridge/amd/agesa/hudson/spi.c +++ b/src/southbridge/amd/agesa/hudson/spi.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ #include <stdint.h> -#include <stdlib.h> #include <device/mmio.h> #include <console/console.h> #include <spi_flash.h> diff --git a/src/southbridge/intel/bd82x6x/me_status.c b/src/southbridge/intel/bd82x6x/me_status.c index 4d9540a..e0b2cbe 100644 --- a/src/southbridge/intel/bd82x6x/me_status.c +++ b/src/southbridge/intel/bd82x6x/me_status.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */
-#include <stdlib.h> #include <console/console.h> #include "me.h"
diff --git a/src/southbridge/intel/common/smbus.c b/src/southbridge/intel/common/smbus.c index e575abc..db934a3 100644 --- a/src/southbridge/intel/common/smbus.c +++ b/src/southbridge/intel/common/smbus.c @@ -19,7 +19,6 @@ #include <arch/io.h> #include <console/console.h> #include <device/smbus_def.h> -#include <stdlib.h> #include <types.h>
#include "smbus.h" diff --git a/src/southbridge/intel/i82801ix/i82801ix.c b/src/southbridge/intel/i82801ix/i82801ix.c index 132b684..753c336a 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.c +++ b/src/southbridge/intel/i82801ix/i82801ix.c @@ -16,7 +16,6 @@ * GNU General Public License for more details. */
-#include <stdlib.h> #include <arch/io.h> #include <device/pci_ops.h> #include <device/device.h> diff --git a/src/southbridge/intel/i82801jx/i82801jx.c b/src/southbridge/intel/i82801jx/i82801jx.c index 490ece7..ebd427f 100644 --- a/src/southbridge/intel/i82801jx/i82801jx.c +++ b/src/southbridge/intel/i82801jx/i82801jx.c @@ -16,7 +16,6 @@ * GNU General Public License for more details. */
-#include <stdlib.h> #include <arch/io.h> #include <device/pci_ops.h> #include <device/device.h> diff --git a/src/southbridge/intel/lynxpoint/me_status.c b/src/southbridge/intel/lynxpoint/me_status.c index ad8362d..8f6932b 100644 --- a/src/southbridge/intel/lynxpoint/me_status.c +++ b/src/southbridge/intel/lynxpoint/me_status.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */
-#include <stdlib.h> #include <console/console.h> #include "me.h"
diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c index b5ccfa6..60668dd 100644 --- a/src/southbridge/intel/lynxpoint/serialio.c +++ b/src/southbridge/intel/lynxpoint/serialio.c @@ -21,7 +21,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> #include "chip.h" #include "pch.h" #include "nvs.h"
-
HAOUAS Elyes (Code Review) -
Kyösti Mälkki (Code Review)