Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56151 )
Change subject: cpu/x86/mtrr: Add check_var_mtrr_range_enabled() helper function ......................................................................
cpu/x86/mtrr: Add check_var_mtrr_range_enabled() helper function
This patch creates a helper function to verify if a given address range is belogs to variable MTRRs. check_var_mtrr_range_enabled() function performs this check to know if the given address range is cacheable.
Change-Id: I0df698c1501ad678ec0d58e133d7e437b658f4ca Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/cpu/x86/mtrr/earlymtrr.c M src/include/cpu/x86/mtrr.h 2 files changed, 52 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/56151/1
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index aa301d0..2cd9428 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -132,3 +132,53 @@ { return var_mtrr_set_with_cb(ctx, addr, size, type, set_mtrr); } + +static bool get_var_mtrr_range(int index, uintptr_t *base_address, size_t *length) +{ + bool ret = false; + uint32_t address_bits; + uint64_t address_mask; + const uint32_t msr_reg = MTRR_PHYS_BASE(index); + uint64_t mask; + union { + uint64_t u64; + msr_t s; + } msr_a; + union { + uint64_t u64; + msr_t s; + } msr_m; + + address_bits = cpu_phys_address_size(); + address_mask = (1ULL << address_bits) - 1; + + msr_a.s = rdmsr(msr_reg); + msr_m.s = rdmsr(msr_reg + 1); + if (msr_m.u64 & MTRR_PHYS_MASK_VALID) { + *base_address = (msr_a.u64 & 0xfffffffffffff000ULL) + & address_mask; + + mask = (msr_m.u64 & 0xfffffffffffff000ULL) & address_mask; + *length = (~mask & address_mask) + 1; + ret = true; + } + return ret; +} + +bool check_var_mtrr_range_enabled(uintptr_t base, size_t size) +{ + uintptr_t base_address; + size_t length; + bool ret = false; + int variable_mtrrs_cnt = get_var_mtrr_count(); + for (int i = 0; i < variable_mtrrs_cnt; i++) { + if (get_var_mtrr_range(i, &base_address, &length)) { + if (base_address == base && length == size) { + ret = true; + break; + } + } + } + + return ret; +} diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index b8d1517..097e0ea 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -96,6 +96,8 @@ /* Set up fixed MTRRs but do not enable them. */ void x86_setup_fixed_mtrrs_no_enable(void); void x86_mtrr_check(void); +/* Function to check if a given address range is belongs to variable MTRRs */ +bool check_var_mtrr_range_enabled(uintptr_t base, size_t size);
/* Insert a temporary MTRR range for the duration of coreboot's runtime. * This function needs to be called after the first MTRR solution is derived. */