New patch to review for coreboot: 13d134b arm64: Reorganize payload entry code and related Kconfigs

[Patrick Georgi]

Patrick Georgi ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10246

-gerrit

commit 13d134b53a4819a723f0797372c3df9a24b56b10
Author: Julius Werner 
Date:   Thu May 7 16:59:31 2015 -0700

arm64: Reorganize payload entry code and related Kconfigs

This patch slightly reorganizes arm64/boot.c with the aim of being more
    readable: we need to sync the i-cache in both code paths, so do it in
    a single location.

[pg: taken from patch linked below]

Change-Id: Iab173acfc6d66e4dccb6f6ab916aea2007632bfd
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: 5067e47bc03f04ad2dba044f022716e0fc62bb9e
    Original-Change-Id: I1b2038acc0d054716a3c580ce97ea8e9a45abfa2
    Original-Signed-off-by: Julius Werner 
    Original-Reviewed-on: https://chromium-review.googlesource.com/270783
    Original-Reviewed-by: Aaron Durbin 
---
 src/arch/arm64/boot.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c
index c925c08..702953c 100644
--- a/src/arch/arm64/boot.c
+++ b/src/arch/arm64/boot.c
@@ -45,11 +45,12 @@ static void run_payload(struct prog *prog)
    	if (IS_ENABLED(CONFIG_ARM64_USE_SPINTABLE))
    		spintable_start();

+		cache_sync_instructions();
+
    	printk(BIOS_SPEW, "entry    = %p\n", doit);

/* If current EL is not EL3, jump to payload at same EL. */
    	if (current_el != EL3) {
-			cache_sync_instructions();
    		/* Point of no-return */
    		doit(arg);
    	}
@@ -61,7 +62,6 @@ static void run_payload(struct prog *prog)

exc_state.elx.spsr = get_eret_el(EL2, SPSR_USE_L);

-		cache_sync_instructions();
    	transition_with_entry(doit, arg, &exc_state);
    }
 }