Attention is currently required from: Sean Rhodes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62706 )
Change subject: mb/starlabs/lite: Add Lite Mk IV variant ......................................................................
Patch Set 18: Code-Review+1
(6 comments)
File src/mainboard/starlabs/lite/Kconfig:
https://review.coreboot.org/c/coreboot/+/62706/comment/623bcba5_caf99b7f PS18, Line 42: default "glkr" if BOARD_STARLABS_LITE_GLKR nit: if alignment?
https://review.coreboot.org/c/coreboot/+/62706/comment/b1a03385_0c14784f PS18, Line 77: default "glkr" if BOARD_STARLABS_LITE_GLKR nit: if alignment?
File src/mainboard/starlabs/lite/variants/glkr/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/62706/comment/71c96ab7_9f83a670 PS18, Line 6: # Graphics : # TODO: : # register "panel_cfg" = "{ : # .up_delay_ms = 0, // T3 : # .backlight_on_delay_ms = 0, // T7 : # .backlight_off_delay_ms = 0, // T9 : # .down_delay_ms = 0, // T10 : # .cycle_delay_ms = 500, // T12 : # .backlight_pwm_hz = 200, // PWM : # }" Anything to do?
https://review.coreboot.org/c/coreboot/+/62706/comment/55fdad8c_0df9e552 PS18, Line 23: register "dptf_enable" = "0" Can be omitted
https://review.coreboot.org/c/coreboot/+/62706/comment/7fd4822c_1687ff3c PS18, Line 36: : register "pcie_rp_clkreq_pin[0]" = "CLKREQ_DISABLED" : register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED" : register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED" : register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED" : register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED" : register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED" : : register "pcie_rp_deemphasis_enable[0]" = "1" : register "pcie_rp_deemphasis_enable[1]" = "1" : register "pcie_rp_deemphasis_enable[2]" = "1" : register "pcie_rp_deemphasis_enable[3]" = "1" : register "pcie_rp_deemphasis_enable[4]" = "1" : register "pcie_rp_deemphasis_enable[5]" = "1" Hmmm, but all PCIe ports are off?
File src/mainboard/starlabs/lite/variants/glkr/romstage.c:
https://review.coreboot.org/c/coreboot/+/62706/comment/13b37c76_24025bff PS18, Line 52: void mainboard_memory_init_params(FSPM_UPD *memupd) A bunch of the settings in here should be the same for GLK and GLKR. Can be done as a follow-up.
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Angel Pons (Code Review)