Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31032
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
cpu/intel/model_406dx: Remove the notion of CPU sockets
Change-Id: I5e8fb2e7331d02224a4199c4d05f92c603c57f78 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/fsp_model_406dx/Kconfig M src/cpu/intel/fsp_model_406dx/Makefile.inc D src/cpu/intel/socket_rPGA989/Kconfig D src/cpu/intel/socket_rPGA989/Makefile.inc M src/mainboard/adi/rcc-dff/Kconfig M src/mainboard/intel/littleplains/Kconfig M src/mainboard/intel/mohonpeak/Kconfig 7 files changed, 9 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/31032/1
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig index 79658f9..f40842f 100644 --- a/src/cpu/intel/fsp_model_406dx/Kconfig +++ b/src/cpu/intel/fsp_model_406dx/Kconfig @@ -26,6 +26,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select SMP + select MMX select SSE2 select UDELAY_LAPIC select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/fsp_model_406dx/Makefile.inc b/src/cpu/intel/fsp_model_406dx/Makefile.inc index 26f4633..97bb981 100644 --- a/src/cpu/intel/fsp_model_406dx/Makefile.inc +++ b/src/cpu/intel/fsp_model_406dx/Makefile.inc @@ -17,6 +17,14 @@ subdirs-y += ../../x86/name subdirs-y += ../common
+subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../turbo + ramstage-y += acpi.c
CPPFLAGS_romstage += -I$(src)/cpu/intel/fsp_model_406dx diff --git a/src/cpu/intel/socket_rPGA989/Kconfig b/src/cpu/intel/socket_rPGA989/Kconfig deleted file mode 100644 index 1d1f64f..0000000 --- a/src/cpu/intel/socket_rPGA989/Kconfig +++ /dev/null @@ -1,11 +0,0 @@ -config CPU_INTEL_SOCKET_RPGA989 - bool - -if CPU_INTEL_SOCKET_RPGA989 - -config SOCKET_SPECIFIC_OPTIONS # dummy - def_bool y - select MMX - select SSE - -endif diff --git a/src/cpu/intel/socket_rPGA989/Makefile.inc b/src/cpu/intel/socket_rPGA989/Makefile.inc deleted file mode 100644 index 539f285..0000000 --- a/src/cpu/intel/socket_rPGA989/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode -subdirs-y += ../turbo diff --git a/src/mainboard/adi/rcc-dff/Kconfig b/src/mainboard/adi/rcc-dff/Kconfig index f87535c..e7be77c 100644 --- a/src/mainboard/adi/rcc-dff/Kconfig +++ b/src/mainboard/adi/rcc-dff/Kconfig @@ -17,7 +17,6 @@
config BOARD_SPECIFIC_OPTIONS def_bool y - select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_FSP_RANGELEY select SOUTHBRIDGE_INTEL_FSP_RANGELEY select BOARD_ROMSIZE_KB_2048 #actual chip is 8MB diff --git a/src/mainboard/intel/littleplains/Kconfig b/src/mainboard/intel/littleplains/Kconfig index 70b9580..b5a57b7 100644 --- a/src/mainboard/intel/littleplains/Kconfig +++ b/src/mainboard/intel/littleplains/Kconfig @@ -17,7 +17,6 @@
config BOARD_SPECIFIC_OPTIONS def_bool y - select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_FSP_RANGELEY select SOUTHBRIDGE_INTEL_FSP_RANGELEY select BOARD_ROMSIZE_KB_8192 diff --git a/src/mainboard/intel/mohonpeak/Kconfig b/src/mainboard/intel/mohonpeak/Kconfig index dc9dc84..de91ca4 100644 --- a/src/mainboard/intel/mohonpeak/Kconfig +++ b/src/mainboard/intel/mohonpeak/Kconfig @@ -17,7 +17,6 @@
config BOARD_SPECIFIC_OPTIONS def_bool y - select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_FSP_RANGELEY select SOUTHBRIDGE_INTEL_FSP_RANGELEY select BOARD_ROMSIZE_KB_2048 #actual chip is 8MB
Hello Patrick Rudolph, build bot (Jenkins), David Guckian, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31032
to look at the new patch set (#2).
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
cpu/intel/model_406dx: Remove the notion of CPU sockets
Change-Id: I5e8fb2e7331d02224a4199c4d05f92c603c57f78 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/fsp_model_406dx/Kconfig M src/cpu/intel/fsp_model_406dx/Makefile.inc D src/cpu/intel/socket_rPGA989/Kconfig D src/cpu/intel/socket_rPGA989/Makefile.inc M src/mainboard/adi/rcc-dff/Kconfig M src/mainboard/adi/rcc-dff/devicetree.cb M src/mainboard/intel/littleplains/Kconfig M src/mainboard/intel/littleplains/devicetree.cb M src/mainboard/intel/mohonpeak/Kconfig M src/mainboard/intel/mohonpeak/devicetree.cb 10 files changed, 12 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/31032/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31032 )
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
Patch Set 2: Code-Review+1
David Guckian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31032 )
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
Patch Set 2: Code-Review+1
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31032 )
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
Patch Set 5:
nano +33 cpu/intel/Kconfig
Hello Patrick Rudolph, David Guckian, Paul Menzel, build bot (Jenkins), David Guckian, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31032
to look at the new patch set (#6).
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
cpu/intel/model_406dx: Remove the notion of CPU sockets
Change-Id: I5e8fb2e7331d02224a4199c4d05f92c603c57f78 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/Kconfig M src/cpu/intel/fsp_model_406dx/Kconfig M src/cpu/intel/fsp_model_406dx/Makefile.inc D src/cpu/intel/socket_rPGA989/Kconfig D src/cpu/intel/socket_rPGA989/Makefile.inc M src/mainboard/adi/rcc-dff/Kconfig M src/mainboard/adi/rcc-dff/devicetree.cb M src/mainboard/intel/littleplains/Kconfig M src/mainboard/intel/littleplains/devicetree.cb M src/mainboard/intel/mohonpeak/Kconfig M src/mainboard/intel/mohonpeak/devicetree.cb 11 files changed, 12 insertions(+), 31 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/31032/6
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31032 )
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
Patch Set 5:
nano +33 cpu/intel/Kconfig
src/cpu/intel/Makefile.inc line 16 and util/autoport/sandybridge.go line 111
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31032 )
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
Patch Set 6: Code-Review+2
Seems reasonable
Hello Patrick Rudolph, David Guckian, Paul Menzel, build bot (Jenkins), Martin Roth, David Guckian, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31032
to look at the new patch set (#7).
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
cpu/intel/model_406dx: Remove the notion of CPU sockets
Change-Id: I5e8fb2e7331d02224a4199c4d05f92c603c57f78 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/Kconfig M src/cpu/intel/Makefile.inc M src/cpu/intel/fsp_model_406dx/Kconfig M src/cpu/intel/fsp_model_406dx/Makefile.inc D src/cpu/intel/socket_rPGA989/Kconfig D src/cpu/intel/socket_rPGA989/Makefile.inc M src/mainboard/adi/rcc-dff/Kconfig M src/mainboard/adi/rcc-dff/devicetree.cb M src/mainboard/intel/littleplains/Kconfig M src/mainboard/intel/littleplains/devicetree.cb M src/mainboard/intel/mohonpeak/Kconfig M src/mainboard/intel/mohonpeak/devicetree.cb 12 files changed, 12 insertions(+), 32 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/31032/7
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31032 )
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
Patch Set 7: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31032 )
Change subject: cpu/intel/model_406dx: Remove the notion of CPU sockets ......................................................................
cpu/intel/model_406dx: Remove the notion of CPU sockets
Change-Id: I5e8fb2e7331d02224a4199c4d05f92c603c57f78 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/31032 Reviewed-by: HAOUAS Elyes ehaouas@noos.fr Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/cpu/intel/Kconfig M src/cpu/intel/Makefile.inc M src/cpu/intel/fsp_model_406dx/Kconfig M src/cpu/intel/fsp_model_406dx/Makefile.inc D src/cpu/intel/socket_rPGA989/Kconfig D src/cpu/intel/socket_rPGA989/Makefile.inc M src/mainboard/adi/rcc-dff/Kconfig M src/mainboard/adi/rcc-dff/devicetree.cb M src/mainboard/intel/littleplains/Kconfig M src/mainboard/intel/littleplains/devicetree.cb M src/mainboard/intel/mohonpeak/Kconfig M src/mainboard/intel/mohonpeak/devicetree.cb 12 files changed, 12 insertions(+), 32 deletions(-)
Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved
diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index 1a1bef0..4fd8efb 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -27,7 +27,6 @@ source src/cpu/intel/socket_mPGA604/Kconfig source src/cpu/intel/socket_441/Kconfig source src/cpu/intel/socket_LGA775/Kconfig -source src/cpu/intel/socket_rPGA989/Kconfig # Architecture specific features source src/cpu/intel/fit/Kconfig source src/cpu/intel/turbo/Kconfig diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc index 76f7491..3ed3297 100644 --- a/src/cpu/intel/Makefile.inc +++ b/src/cpu/intel/Makefile.inc @@ -11,7 +11,6 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478MN) += socket_mPGA478MN subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604 -subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA989) += socket_rPGA989 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x subdirs-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += model_206ax subdirs-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += model_206ax diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig index 79658f9..f40842f 100644 --- a/src/cpu/intel/fsp_model_406dx/Kconfig +++ b/src/cpu/intel/fsp_model_406dx/Kconfig @@ -26,6 +26,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select SMP + select MMX select SSE2 select UDELAY_LAPIC select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/fsp_model_406dx/Makefile.inc b/src/cpu/intel/fsp_model_406dx/Makefile.inc index 26f4633..97bb981 100644 --- a/src/cpu/intel/fsp_model_406dx/Makefile.inc +++ b/src/cpu/intel/fsp_model_406dx/Makefile.inc @@ -17,6 +17,14 @@ subdirs-y += ../../x86/name subdirs-y += ../common
+subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../turbo + ramstage-y += acpi.c
CPPFLAGS_romstage += -I$(src)/cpu/intel/fsp_model_406dx diff --git a/src/cpu/intel/socket_rPGA989/Kconfig b/src/cpu/intel/socket_rPGA989/Kconfig deleted file mode 100644 index 1d1f64f..0000000 --- a/src/cpu/intel/socket_rPGA989/Kconfig +++ /dev/null @@ -1,11 +0,0 @@ -config CPU_INTEL_SOCKET_RPGA989 - bool - -if CPU_INTEL_SOCKET_RPGA989 - -config SOCKET_SPECIFIC_OPTIONS # dummy - def_bool y - select MMX - select SSE - -endif diff --git a/src/cpu/intel/socket_rPGA989/Makefile.inc b/src/cpu/intel/socket_rPGA989/Makefile.inc deleted file mode 100644 index 539f285..0000000 --- a/src/cpu/intel/socket_rPGA989/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode -subdirs-y += ../turbo diff --git a/src/mainboard/adi/rcc-dff/Kconfig b/src/mainboard/adi/rcc-dff/Kconfig index f87535c..e7be77c 100644 --- a/src/mainboard/adi/rcc-dff/Kconfig +++ b/src/mainboard/adi/rcc-dff/Kconfig @@ -17,7 +17,6 @@
config BOARD_SPECIFIC_OPTIONS def_bool y - select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_FSP_RANGELEY select SOUTHBRIDGE_INTEL_FSP_RANGELEY select BOARD_ROMSIZE_KB_2048 #actual chip is 8MB diff --git a/src/mainboard/adi/rcc-dff/devicetree.cb b/src/mainboard/adi/rcc-dff/devicetree.cb index 1df54d3..0cb73f8 100644 --- a/src/mainboard/adi/rcc-dff/devicetree.cb +++ b/src/mainboard/adi/rcc-dff/devicetree.cb @@ -15,10 +15,8 @@ chip northbridge/intel/fsp_rangeley
device cpu_cluster 0 on - chip cpu/intel/socket_rPGA989 - device lapic 0 on end - end chip cpu/intel/fsp_model_406dx + device lapic 0 on end # Magic APIC ID to locate this chip device lapic 0xACAC off end
diff --git a/src/mainboard/intel/littleplains/Kconfig b/src/mainboard/intel/littleplains/Kconfig index 70b9580..b5a57b7 100644 --- a/src/mainboard/intel/littleplains/Kconfig +++ b/src/mainboard/intel/littleplains/Kconfig @@ -17,7 +17,6 @@
config BOARD_SPECIFIC_OPTIONS def_bool y - select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_FSP_RANGELEY select SOUTHBRIDGE_INTEL_FSP_RANGELEY select BOARD_ROMSIZE_KB_8192 diff --git a/src/mainboard/intel/littleplains/devicetree.cb b/src/mainboard/intel/littleplains/devicetree.cb index 1df54d3..0cb73f8 100644 --- a/src/mainboard/intel/littleplains/devicetree.cb +++ b/src/mainboard/intel/littleplains/devicetree.cb @@ -15,10 +15,8 @@ chip northbridge/intel/fsp_rangeley
device cpu_cluster 0 on - chip cpu/intel/socket_rPGA989 - device lapic 0 on end - end chip cpu/intel/fsp_model_406dx + device lapic 0 on end # Magic APIC ID to locate this chip device lapic 0xACAC off end
diff --git a/src/mainboard/intel/mohonpeak/Kconfig b/src/mainboard/intel/mohonpeak/Kconfig index dc9dc84..de91ca4 100644 --- a/src/mainboard/intel/mohonpeak/Kconfig +++ b/src/mainboard/intel/mohonpeak/Kconfig @@ -17,7 +17,6 @@
config BOARD_SPECIFIC_OPTIONS def_bool y - select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_FSP_RANGELEY select SOUTHBRIDGE_INTEL_FSP_RANGELEY select BOARD_ROMSIZE_KB_2048 #actual chip is 8MB diff --git a/src/mainboard/intel/mohonpeak/devicetree.cb b/src/mainboard/intel/mohonpeak/devicetree.cb index 1df54d3..0cb73f8 100644 --- a/src/mainboard/intel/mohonpeak/devicetree.cb +++ b/src/mainboard/intel/mohonpeak/devicetree.cb @@ -15,10 +15,8 @@ chip northbridge/intel/fsp_rangeley
device cpu_cluster 0 on - chip cpu/intel/socket_rPGA989 - device lapic 0 on end - end chip cpu/intel/fsp_model_406dx + device lapic 0 on end # Magic APIC ID to locate this chip device lapic 0xACAC off end
-
Arthur Heymans (Code Review) -
David Guckian (Code Review)
-
HAOUAS Elyes (Code Review)
-
Martin Roth (Code Review)
-
Patrick Georgi (Code Review)
-
Paul Menzel (Code Review)