Change in coreboot[master]: Rename ECAM-specific MMCONF Kconfigs

[Furquan Shaikh (Code Review)]

Attention is currently required from: Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Stefan Reinauer, Kyösti Mälkki, Andrey Petrov, Patrick Rudolph, Nico Huber, Anjaneya "Reddy" Chagam, Johnny Lin, Suresh Bellampalli, Morgan Jang, Michal Motyl, Alexander Couzens, Felix Held, Shelley Chen, Angel Pons, Lance Zhao, Jason Glenesk, Martin Roth, Damien Zammit, Lee Leahy, Marshall Dawson, Tim Wawrzynczak, Vanessa Eusebio, Huang Jin.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57333 )

Change subject: Rename ECAM-specific MMCONF Kconfigs
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Patch Set 8:

(2 comments)

File src/device/Kconfig:

https://review.coreboot.org/c/coreboot/+/57333/comment/649aa7d0_5093e909 
PS8, Line 501: 
             : config PCI_NO_MMIO_OPS
             : 	bool
             : 	default n
             : 	help
             : 	  If this config is selected, the MMIO access for PCI config
             : 	  space is disabled.
             :
> Are there scenarios where this is different from !PCI_ECAM? At least the previous naming suggested t […]

Yes, the platforms might use any of the following mechanisms to access PCI config space:

1. No MMIO ops for accessing PCI config space --> Fall back to IO ops (only applicable to x86)
2. MMIO ops and PCI_ECAM --> Use MMIO ops and config space is mapped in address space as defined by ECAM in PCIe spec.
3. MMIO ops but !PCI_ECAM --> Use MMIO ops and config space is mapped in address space as defined by some platform specific mechanism.

Before this change, we only supported #1 and #2 in coreboot. So, NO_MMCONF_SUPPORT indicated #1. Now, we want to support #1, #2 and #3. PCI_NO_MMIO_OPS refers to case #1.

File src/drivers/intel/fsp1_1/romstage.c:

https://review.coreboot.org/c/coreboot/+/57333/comment/321b37bd_573e5221 
PS8, Line 107: if (!CONFIG(PCI_NO_MMIO_OPS))
> In the Kconfig we defined: […]

+1 to use of PCI_ECAM here.