Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/25456 )
Change subject: vc/amd/stoneyridge: Add definition for AGESA heap rebase ......................................................................
vc/amd/stoneyridge: Add definition for AGESA heap rebase
AgesaHeapRebase is an optional callout that allows AGESA to use a coreboot-managed heap base address. Its internal default location is determined by AMD_HEAP_START_ADDRESS which is defined as 4 MB.
Add a #define that AGESA may use once the feature is available.
BUG=b:74518368
Change-Id: Id23455779b1c8c4931ad1a3122587e09ad237ecc Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-on: https://review.coreboot.org/25456 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Richard Spiegel richard.spiegel@silverbackltd.com --- M src/vendorcode/amd/pi/00670F00/AGESA.h 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Richard Spiegel: Looks good to me, approved
diff --git a/src/vendorcode/amd/pi/00670F00/AGESA.h b/src/vendorcode/amd/pi/00670F00/AGESA.h index 2b2a8b6..ba1e505 100644 --- a/src/vendorcode/amd/pi/00670F00/AGESA.h +++ b/src/vendorcode/amd/pi/00670F00/AGESA.h @@ -68,6 +68,7 @@ #define AGESA_IDLE_AN_AP 0x00028107ul #define AGESA_WAIT_FOR_ALL_APS 0x00028108ul #define AGESA_HALT_THIS_AP 0x00028109ul +#define AGESA_HEAP_REBASE 0x0002810aul
// AGESA ADVANCED CALLOUTS, Memory #define AGESA_READ_SPD 0x00028140ul