[XS] Change in coreboot[main]: sb/intel/bd82x6x/acpi/pch: Support optional XHCI _OSC

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78433?usp=email )

Change subject: sb/intel/bd82x6x/acpi/pch: Support optional XHCI _OSC
......................................................................

sb/intel/bd82x6x/acpi/pch: Support optional XHCI _OSC

It's unclear which OS rely on the _OSC ACPI method using the UUID
"7c9512a9-1705-4cb4-af7d-506a2423ab71" and only one board seem to
make use of it. Allow to make this method optional by using
CondRefOf() to check if the method is implemented.

Change-Id: I025f6c2d40adecd6bac418f5acfbd9ef5c6820a6
Signed-off-by: Patrick Rudolph 
---
M src/southbridge/intel/bd82x6x/acpi/pch.asl
1 file changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/78433/1

diff --git a/src/southbridge/intel/bd82x6x/acpi/pch.asl b/src/southbridge/intel/bd82x6x/acpi/pch.asl
index 718d79e..157c8dc 100644
--- a/src/southbridge/intel/bd82x6x/acpi/pch.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/pch.asl
@@ -240,7 +240,9 @@
    /* Check for XHCI */
    If (Arg0 == ToUUID("7c9512a9-1705-4cb4-af7d-506a2423ab71"))
    {
-		Return (^XHC.POSC(Arg2, Arg3))
+		If (CondRefOf (^XHC.POSC)) {
+			Return (^XHC.POSC(Arg2, Arg3))
+		}
    }

/* Check for PCIe */