Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42906 )
Change subject: mb/google/dedede: set tcc_offset value to 10 ......................................................................
mb/google/dedede: set tcc_offset value to 10
Set tcc_offset value to 10 in devicetree for Thermal Control Circuit (TCC) activation feature.
BUG=None BRANCH=None TEST=Built for dedede platform and verified the MSR value
Change-Id: I53d1bd413c64643cf8bdaef266bde25a2f3a97ee Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/42906/1
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index f95d123..32f6690 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -155,6 +155,8 @@ # Enable processor thermal control register "Device4Enable" = "1"
+ register "tcc_offset" = "10" # TCC of 90C + # chipset_lockdown configuration # Use below format to override value in overridetree.cb if required # format:
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42906 )
Change subject: mb/google/dedede: set tcc_offset value to 10 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42906/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42906/2//COMMIT_MSG@10 PS2, Line 10: Circuit (TCC) activation feature. What is the default value?
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42906 )
Change subject: mb/google/dedede: set tcc_offset value to 10 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42906/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42906/2//COMMIT_MSG@10 PS2, Line 10: Circuit (TCC) activation feature.
What is the default value?
Default value is 0 and here setting the same value as initial value. Going forward we need to fine tune this value and update devicetree entry.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42906 )
Change subject: mb/google/dedede: set tcc_offset value to 10 ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42906 )
Change subject: mb/google/dedede: set tcc_offset value to 10 ......................................................................
mb/google/dedede: set tcc_offset value to 10
Set tcc_offset value to 10 in devicetree for Thermal Control Circuit (TCC) activation feature.
BUG=None BRANCH=None TEST=Built for dedede platform and verified the MSR value
Change-Id: I53d1bd413c64643cf8bdaef266bde25a2f3a97ee Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42906 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index f95d123..32f6690 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -155,6 +155,8 @@ # Enable processor thermal control register "Device4Enable" = "1"
+ register "tcc_offset" = "10" # TCC of 90C + # chipset_lockdown configuration # Use below format to override value in overridetree.cb if required # format:
-
Patrick Georgi (Code Review) -
Paul Menzel (Code Review)
-
Sumeet R Pawnikar (Code Review)
-
Tim Wawrzynczak (Code Review)