Change in coreboot[master]: mb/google/octopus/var/fleex: Add cs42l42 HSBIAS setting

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/53901 )

Change subject: mb/google/octopus/var/fleex: Add cs42l42 HSBIAS setting
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mb/google/octopus/var/fleex: Add cs42l42 HSBIAS setting

Disable HSBIAS sense setting.

BUG=b:184103445
TEST=boot to check cs42l42 is functional.

Signed-off-by: Ian Feng 
Change-Id: I12c0e0a0f7490d35d36fe8ccbc940f29e1bb7976
Reviewed-on: https://review.coreboot.org/c/coreboot/+/53901
Tested-by: build bot (Jenkins) 
Reviewed-by: Vitaly Rodionov 
Reviewed-by: Furquan Shaikh 
---
M src/mainboard/google/octopus/variants/fleex/overridetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  Vitaly Rodionov: Looks good to me, but someone else must approve

diff --git a/src/mainboard/google/octopus/variants/fleex/overridetree.cb b/src/mainboard/google/octopus/variants/fleex/overridetree.cb
index f0343cd..5007719 100644
--- a/src/mainboard/google/octopus/variants/fleex/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/fleex/overridetree.cb
@@ -148,6 +148,7 @@
    			register "bias_lvls[2]" = "4"
    			register "bias_lvls[3]" = "1"
    			register "hs_bias_ramp_rate" = "HSBIAS_RAMP_SLOW"
+				register "hs_bias_sense_disable" = "true"
    			device i2c 48 on end
    		end
    	end	# - I2C 5