Attention is currently required from: Jianjun Wang. Hello build bot (Jenkins),
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https://review.coreboot.org/c/coreboot/+/56794
to look at the new patch set (#5).
Change subject: libpayload/pci: Add PCIe interfaces for MediaTek platform ......................................................................
libpayload/pci: Add PCIe interfaces for MediaTek platform
Add PCIe configuration interfaces for MediaTek platform.
The register base address of PCIe hardware might be different when it's a non-x86 platform, add 'pci_update_hw_base()' interface for users to update its base address to access PCIe hardware correctly.
TEST=Build pass and boot up to kernel successfully via SSD on Cherry board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x1987 PCI SSVID : 0x1987 SN : 28F40713077B0012602 MN : Phison ESE1A043-X28 RAB : 0x1 AERL : 0x3 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model Phison ESE1A043-X28
BUG=b:178565024
Signed-off-by: Jianjun Wang jianjun.wang@mediatek.com Change-Id: I9ea7d111fed6b816fa2352fe93c268116519a577 --- M payloads/libpayload/Kconfig M payloads/libpayload/drivers/Makefile.inc A payloads/libpayload/drivers/pcie_mediatek.c M payloads/libpayload/include/pci.h 4 files changed, 48 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/56794/5