[S] Change in coreboot[main]: soc/intel/{mtl,ptl,tgl}: Fix incorrect reporting of S0ix

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86133?usp=email )

Change subject: soc/intel/{mtl,ptl,tgl}: Fix incorrect reporting of S0ix
......................................................................

soc/intel/{mtl,ptl,tgl}: Fix incorrect reporting of S0ix

If S0ix is not enabled, then it should not be reported that it
is supported.

TEST=boot linux on starlabs boards, check s2idle isn't
listed under `/sys/power/mem_sleep`.

Change-Id: Ifcf70d127cdea64bdf42cbc9a60dfc4ec740615a
Signed-off-by: Sean Rhodes 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86133
Reviewed-by: Kapil Porwal 
Tested-by: build bot (Jenkins) 
Reviewed-by: Jérémy Compostella 
Reviewed-by: Subrata Banik 
Reviewed-by: Jayvik Desai 
---
M src/soc/intel/meteorlake/cpu.c
M src/soc/intel/pantherlake/cpu.c
M src/soc/intel/tigerlake/lpm.c
3 files changed, 13 insertions(+), 0 deletions(-)

Approvals:
  Jayvik Desai: Looks good to me, approved
  build bot (Jenkins): Verified
  Subrata Banik: Looks good to me, approved
  Jérémy Compostella: Looks good to me, approved
  Kapil Porwal: Looks good to me, approved

diff --git a/src/soc/intel/meteorlake/cpu.c b/src/soc/intel/meteorlake/cpu.c
index c8129f5..b4854cb 100644
--- a/src/soc/intel/meteorlake/cpu.c
+++ b/src/soc/intel/meteorlake/cpu.c
@@ -41,6 +41,10 @@

uint8_t get_supported_lpm_mask(void)
 {
+	const config_t *conf = config_of_soc();
+	if (!conf->s0ix_enable)
+		return 0;
+
    return LPM_S0i2_0 | LPM_S0i2_1 | LPM_S0i2_2;
 }

diff --git a/src/soc/intel/pantherlake/cpu.c b/src/soc/intel/pantherlake/cpu.c
index 4b3c950..f821507 100644
--- a/src/soc/intel/pantherlake/cpu.c
+++ b/src/soc/intel/pantherlake/cpu.c
@@ -42,6 +42,10 @@

uint8_t get_supported_lpm_mask(void)
 {
+	const config_t *conf = config_of_soc();
+	if (!conf->s0ix_enable)
+		return 0;
+
    return LPM_S0i2_0 | LPM_S0i2_1 | LPM_S0i2_2;
 }

diff --git a/src/soc/intel/tigerlake/lpm.c b/src/soc/intel/tigerlake/lpm.c
index fe4f43d..1518623 100644
--- a/src/soc/intel/tigerlake/lpm.c
+++ b/src/soc/intel/tigerlake/lpm.c
@@ -8,6 +8,7 @@
 #include <soc/lpm.h>
 #include <soc/pci_devs.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <types.h>

/* Function returns true if the platform is TGL-UP3 */
@@ -26,6 +27,10 @@

int get_supported_lpm_mask(struct soc_intel_tigerlake_config *config)
 {
+	const config_t *conf = config_of_soc();
+	if (!conf->s0ix_enable)
+		return 0;
+
    int disable_mask;

/* Disable any sub-states requested by mainboard */