Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31294
Change subject: arch/x86: Drop stale comment ......................................................................
arch/x86: Drop stale comment
Change-Id: I1ba6dfb502ff053ccf82d2acc5fefbbfe09d647b Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/include/arch/io.h 1 file changed, 0 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/31294/1
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index f62dc6c..1a27994 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -216,11 +216,6 @@
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
-/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write - * memory above 4G, We don't need to set %fs, and %gs anymore - * Before that We need to use %gs, and leave %fs to other RAM access - */ - #include <arch/pci_io_cfg.h> #include <arch/pci_mmio_cfg.h>
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31294 )
Change subject: arch/x86: Drop stale comment ......................................................................
Patch Set 2: Code-Review+1
Not sure what this comment means though.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31294 )
Change subject: arch/x86: Drop stale comment ......................................................................
Patch Set 3: Code-Review+2
Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31294 )
Change subject: arch/x86: Drop stale comment ......................................................................
arch/x86: Drop stale comment
Change-Id: I1ba6dfb502ff053ccf82d2acc5fefbbfe09d647b Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/31294 Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/arch/x86/include/arch/io.h 1 file changed, 0 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index f62dc6c..1a27994 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -216,11 +216,6 @@
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
-/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write - * memory above 4G, We don't need to set %fs, and %gs anymore - * Before that We need to use %gs, and leave %fs to other RAM access - */ - #include <arch/pci_io_cfg.h> #include <arch/pci_mmio_cfg.h>
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review)
-
Kyösti Mälkki (Code Review)