Change in coreboot[master]: mb/intel/dcp847ske: Drop useless MCHBAR writes

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50534 )

Change subject: mb/intel/dcp847ske: Drop useless MCHBAR writes
......................................................................

mb/intel/dcp847ske: Drop useless MCHBAR writes

There's no need to write the GDCRTRAININGRESULT registers after raminit.

Change-Id: If604920fe7a3bee96f72f8aff5e96f0e25548f18
Signed-off-by: Angel Pons 
---
M src/mainboard/intel/dcp847ske/early_southbridge.c
1 file changed, 0 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/50534/1

diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c
index c18aa83..ea95907 100644
--- a/src/mainboard/intel/dcp847ske/early_southbridge.c
+++ b/src/mainboard/intel/dcp847ske/early_southbridge.c
@@ -10,14 +10,6 @@
 #include "superio.h"
 #include "thermal.h"

-void mainboard_late_rcba_config(void)
-{
-	/* Set "mobile" bit in MCH (which makes sense layout-wise). */
-	/* Note sure if this has any effect at all though. */
-	MCHBAR32(0x0004) |= 0x00001000;
-	MCHBAR32(0x0104) |= 0x00001000;
-}
-
 static const u16 hwm_initvals[] = {
    HWM_BANK(0),
    HWM_INITVAL(0xae, 0x01), /* Enable PECI Agent0 */