Change in coreboot[master]: meowth: Add SAR Sensor in devicetree

[Furquan Shaikh (Code Review)]

Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/25062 )

Change subject: meowth: Add SAR Sensor in devicetree
......................................................................

meowth: Add SAR Sensor in devicetree

Add left and right semtech SAR sensor.

BUG=b:74363445
TEST=Test on meowth, alongside 24962.
Check in sysfs that SX9310 is presented:
/sys/devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:09/SX9310:00
/sys/devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:0d/SX9310:01

Change-Id: I017db1105800003b312e75dc7e1e27be535a457a
Signed-off-by: Gwendal Grignou 
Reviewed-on: https://review.coreboot.org/25062
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
Reviewed-by: Duncan Laurie 
---
M src/mainboard/google/zoombini/variants/meowth/devicetree.cb
M src/mainboard/google/zoombini/variants/meowth/gpio.c
2 files changed, 26 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Duncan Laurie: Looks good to me, approved
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
index 4250121..2d15c97 100644
--- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
+++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
@@ -95,7 +95,17 @@
    			device i2c 0a on end
    		end
    	end # I2C #0
-		device pci 15.1 on  end # I2C #1
+		device pci 15.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""SX9310""
+				register "name" = ""SEMTECH SX9310""
+				register "desc" = ""Left SAR Proximity Sensor""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C3_IRQ)"
+				register "speed" = "I2C_SPEED_FAST_PLUS"
+				register "uid" = "1"
+				device i2c 28 on end
+			end
+		end # I2C #1
    	device pci 15.2 on end # I2C #2
    	device pci 15.3 on
    		chip drivers/i2c/max98373
@@ -123,7 +133,17 @@
    	device pci 16.5 off end # Management Engine Interface 4
    	device pci 17.0 off end # SATA
    	device pci 19.0 on  end # I2C #4
-		device pci 19.1 on  end # I2C #5
+		device pci 19.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""SX9310""
+				register "name" = ""SEMTECH SX9310""
+				register "desc" = ""Right SAR Proximity Sensor""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C4_IRQ)"
+				register "speed" = "I2C_SPEED_FAST_PLUS"
+				register "uid" = "0"
+				device i2c 28 on end
+			end
+		end # I2C #5
    	device pci 19.2 on  end # UART #2
    	device pci 1a.0 on  end # eMMC
    	device pci 1c.0 on  end # PCI Express Port 1 x4 SLOT1
diff --git a/src/mainboard/google/zoombini/variants/meowth/gpio.c b/src/mainboard/google/zoombini/variants/meowth/gpio.c
index 78cab5a..507e653 100644
--- a/src/mainboard/google/zoombini/variants/meowth/gpio.c
+++ b/src/mainboard/google/zoombini/variants/meowth/gpio.c
@@ -86,8 +86,10 @@
 /* SMBCLK */		PAD_NC(GPP_C0, NONE),
 /* SMBDATA */		PAD_NC(GPP_C1, NONE),
 /* SMBALERT# */		PAD_CFG_GPI(GPP_C2, NONE, DEEP), /* GPP_C2_STRAP */
-/* SML0CLK */		PAD_CFG_GPI(GPP_C3, NONE, DEEP), /* PCH_SAR1_INT_L */
-/* SML0DATA */		PAD_CFG_GPI(GPP_C4, NONE, DEEP), /* PCH_SAR0_INT_L */
+/* SML0CLK */		PAD_CFG_GPI_APIC(GPP_C3, NONE, DEEP, LEVEL,
+					NONE), /* PCH_SAR1_INT_L */
+/* SML0DATA */		PAD_CFG_GPI_APIC(GPP_C4, NONE, DEEP, LEVEL,
+					NONE), /* PCH_SAR0_INT_L */
 /* SML0ALERT# */	PAD_CFG_GPI(GPP_C5, NONE, DEEP), /* GPP_C5_STRAP */
 /* SM1CLK */		PAD_CFG_GPO(GPP_C6, 1, DEEP), /* PCH_SAR_PWR_EN */
 /* SM1DATA */		PAD_NC(GPP_C7, NONE),