[S] Change in coreboot[main]: intelblocks/acpi/northbridge.asl: Reserve SBREG BAR

[Paul Menzel (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, CoolStar, Eran Mitrani, Jakub Czapiga, Jeremy Soller, Johnny Lin, Kapil Porwal, Krystian Hebel, Lean Sheng Tan, Martin L Roth, Matt DeVillier, Michał Żygowski, Nick Vaccaro, Subrata Banik, Tarun, Tim Chu.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77445?usp=email )

Change subject: intelblocks/acpi/northbridge.asl: Reserve SBREG BAR
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Patch Set 17:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/77445/comment/27606484_737aef20 :
PS15, Line 7: intelblocks/acpi/notrhbridge.asl
> Currently I am touching only the northbridge. […]

intelblocks is strange to me, but the author’s, that means your, call.

https://review.coreboot.org/c/coreboot/+/77445/comment/4c348169_3c55445c :
PS15, Line 11: ,
> ...SBREG BARs, which, unlike mobile processors, do not fall... […]

Yes, that is my suggestion in the ().

https://review.coreboot.org/c/coreboot/+/77445/comment/34c82563_65e644a7 :
PS15, Line 13:
> There were no problems in particular. […]

Understood. It’d be great if you could add that to the commit message, and also on what device you tested this.

File src/soc/intel/alderlake/include/soc/iomap.h:

https://review.coreboot.org/c/coreboot/+/77445/comment/1fa459b0_be742c96 :
PS15, Line 127: (256 * MiB)
> Fixed

You can check the “Resolved box” in the comment, if you fixed it.