Sheng-Liang Pan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48395 )
Change subject: mb/google/volteer/variant/volta: add Synaptics touchpad. ......................................................................
mb/google/volteer/variant/volta: add Synaptics touchpad.
add new Synaptics touchpad for volta.
BUG=b:174802144 TEST=emerge-volteer coreboot and check touchpad function work.
Signed-off-by: Pan Sheng-Liang sheng-liang.pan@quanta.corp-partner.google.com Change-Id: I7fc8d08b8b2229ca9252618f159fc9c6f91f9d7f --- M src/mainboard/google/volteer/variants/voxel/overridetree.cb 1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/48395/1
diff --git a/src/mainboard/google/volteer/variants/voxel/overridetree.cb b/src/mainboard/google/volteer/variants/voxel/overridetree.cb index 9c4aa47..b161068 100644 --- a/src/mainboard/google/volteer/variants/voxel/overridetree.cb +++ b/src/mainboard/google/volteer/variants/voxel/overridetree.cb @@ -186,6 +186,15 @@ register "probed" = "1" device i2c 15 on end end + chip drivers/i2c/hid + register "generic.hid" = ""PNP0C50"" + register "generic.desc" = ""Synaptics Touchpad"" + register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E15_IRQ)" + register "generic.wake" = "GPE0_DW2_15" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 0x2c on end + end end device ref pch_espi on chip ec/google/chromeec
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48395 )
Change subject: mb/google/volteer/variant/volta: add Synaptics touchpad. ......................................................................
Patch Set 1: Code-Review+2
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48395 )
Change subject: mb/google/volteer/variant/volta: add Synaptics touchpad. ......................................................................
Patch Set 1: Code-Review+2
Sheng-Liang Pan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48395 )
Change subject: mb/google/volteer/variant/volta: add Synaptics touchpad. ......................................................................
Patch Set 2: Code-Review+1
Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48395 )
Change subject: mb/google/volteer/variant/volta: add Synaptics touchpad. ......................................................................
mb/google/volteer/variant/volta: add Synaptics touchpad.
add new Synaptics touchpad for volta.
BUG=b:174802144 TEST=emerge-volteer coreboot and check touchpad function work.
Signed-off-by: Pan Sheng-Liang sheng-liang.pan@quanta.corp-partner.google.com Change-Id: I7fc8d08b8b2229ca9252618f159fc9c6f91f9d7f Reviewed-on: https://review.coreboot.org/c/coreboot/+/48395 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/volteer/variants/voxel/overridetree.cb 1 file changed, 9 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Sumeet R Pawnikar: Looks good to me, approved Sheng-Liang Pan: Looks good to me, but someone else must approve Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/volteer/variants/voxel/overridetree.cb b/src/mainboard/google/volteer/variants/voxel/overridetree.cb index 2dd1566..2caec2a 100644 --- a/src/mainboard/google/volteer/variants/voxel/overridetree.cb +++ b/src/mainboard/google/volteer/variants/voxel/overridetree.cb @@ -185,6 +185,15 @@ register "probed" = "1" device i2c 15 on end end + chip drivers/i2c/hid + register "generic.hid" = ""PNP0C50"" + register "generic.desc" = ""Synaptics Touchpad"" + register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E15_IRQ)" + register "generic.wake" = "GPE0_DW2_15" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 0x2c on end + end end device ref pch_espi on chip ec/google/chromeec