Marshall Dawson has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62354 )
Change subject: mb/google/guybrush: enable coreboot to request spl fuse ......................................................................
mb/google/guybrush: enable coreboot to request spl fuse
Enable guybrush based platforms to send fuse spl command to PSP when required.
BUG=b:180701885 TEST=On a platform that supports SPL fusing. Confirm that PSP indicates fusing is required, and confirm coreboot sends command. Fusing is required when the image is built with an SPL table requiring newer minimum versions. A message indicating fusing was requested will appear in the serial log. "PSP: Fuse SPL requested"
Change-Id: I7bce01513af4e613f546e491d9577c92f50cb85c Signed-off-by: Jason Glenesk jason.glenesk@amd.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/62354 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Karthik Ramasubramanian kramasub@google.com Reviewed-by: Raul Rangel rrangel@chromium.org Reviewed-by: Jon Murphy jpmurphy@google.com --- M src/mainboard/google/guybrush/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved Jon Murphy: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig index 02cac32..ecec688 100644 --- a/src/mainboard/google/guybrush/Kconfig +++ b/src/mainboard/google/guybrush/Kconfig @@ -48,6 +48,7 @@ select SOC_AMD_COMMON_BLOCK_GRAPHICS_ATIF select SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP select SOC_AMD_COMMON_BLOCK_USE_ESPI + select SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL
config CHROMEOS select EC_GOOGLE_CHROMEEC_SWITCHES
2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.