Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45779 )
Change subject: soc/intel/jasperlake: Align with Elkhart Lake ......................................................................
soc/intel/jasperlake: Align with Elkhart Lake
Change-Id: I4ac041081a0c7b97ee7069b7893bd9c1f3d340d4 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/jasperlake/acpi.c M src/soc/intel/jasperlake/cpu.c M src/soc/intel/jasperlake/elog.c M src/soc/intel/jasperlake/espi.c M src/soc/intel/jasperlake/finalize.c M src/soc/intel/jasperlake/include/soc/meminit.h M src/soc/intel/jasperlake/me.c M src/soc/intel/jasperlake/p2sb.c M src/soc/intel/jasperlake/pmc.c M src/soc/intel/jasperlake/pmutil.c M src/soc/intel/jasperlake/reset.c M src/soc/intel/jasperlake/smmrelocate.c M src/soc/intel/jasperlake/systemagent.c 13 files changed, 32 insertions(+), 32 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/45779/1
diff --git a/src/soc/intel/jasperlake/acpi.c b/src/soc/intel/jasperlake/acpi.c index 8673da1..08f44b4 100644 --- a/src/soc/intel/jasperlake/acpi.c +++ b/src/soc/intel/jasperlake/acpi.c @@ -3,16 +3,16 @@ #include <acpi/acpi.h> #include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> -#include <device/device.h> -#include <device/mmio.h> #include <arch/smp/mpspec.h> #include <cbmem.h> #include <console/console.h> +#include <device/device.h> +#include <device/mmio.h> #include <device/pci_ops.h> #include <ec/google/chromeec/ec.h> +#include <intelblocks/acpi.h> #include <intelblocks/cpulib.h> #include <intelblocks/pmclib.h> -#include <intelblocks/acpi.h> #include <soc/cpu.h> #include <soc/iomap.h> #include <soc/nvs.h> diff --git a/src/soc/intel/jasperlake/cpu.c b/src/soc/intel/jasperlake/cpu.c index 3a50929..382bbf7 100644 --- a/src/soc/intel/jasperlake/cpu.c +++ b/src/soc/intel/jasperlake/cpu.c @@ -2,12 +2,12 @@
#include <arch/cpu.h> #include <console/console.h> -#include <device/pci.h> +#include <cpu/intel/smm_reloc.h> +#include <cpu/intel/turbo.h> #include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> -#include <cpu/intel/smm_reloc.h> -#include <cpu/intel/turbo.h> +#include <device/pci.h> #include <fsp/api.h> #include <intelblocks/cpulib.h> #include <intelblocks/mp_init.h> diff --git a/src/soc/intel/jasperlake/elog.c b/src/soc/intel/jasperlake/elog.c index 235dc6e..c88efc8 100644 --- a/src/soc/intel/jasperlake/elog.c +++ b/src/soc/intel/jasperlake/elog.c @@ -2,11 +2,11 @@
#include <bootstate.h> #include <console/console.h> -#include <stdint.h> #include <elog.h> #include <intelblocks/pmclib.h> #include <soc/pci_devs.h> #include <soc/pm.h> +#include <stdint.h>
static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) { diff --git a/src/soc/intel/jasperlake/espi.c b/src/soc/intel/jasperlake/espi.c index bf82067..ab3e42f 100644 --- a/src/soc/intel/jasperlake/espi.c +++ b/src/soc/intel/jasperlake/espi.c @@ -1,15 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/io.h> +#include <arch/ioapic.h> #include <device/device.h> #include <device/pci.h> -#include <pc80/isa-dma.h> -#include <pc80/i8259.h> -#include <arch/io.h> #include <device/pci_ops.h> -#include <arch/ioapic.h> #include <intelblocks/itss.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> +#include <pc80/isa-dma.h> +#include <pc80/i8259.h> #include <soc/espi.h> #include <soc/iomap.h> #include <soc/irq.h> @@ -67,7 +67,7 @@
static void pch_enable_ioapic(const struct device *dev) { - u32 reg32; + uint32_t reg32; /* PCH-LP has 120 redirection entries */ const int redir_entries = 120;
@@ -126,7 +126,7 @@ itss_irq_init(pch_interrupt_routing);
for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { - u8 int_pin = 0, int_line = 0; + uint8_t int_pin = 0, int_line = 0;
if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) continue; diff --git a/src/soc/intel/jasperlake/finalize.c b/src/soc/intel/jasperlake/finalize.c index 08a6bab..0916436 100644 --- a/src/soc/intel/jasperlake/finalize.c +++ b/src/soc/intel/jasperlake/finalize.c @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/io.h> -#include <device/mmio.h> #include <bootstate.h> #include <console/console.h> #include <console/post_codes.h> #include <cpu/x86/smm.h> +#include <device/mmio.h> #include <device/pci.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> diff --git a/src/soc/intel/jasperlake/include/soc/meminit.h b/src/soc/intel/jasperlake/include/soc/meminit.h index 5ba3e69..f3555ac 100644 --- a/src/soc/intel/jasperlake/include/soc/meminit.h +++ b/src/soc/intel/jasperlake/include/soc/meminit.h @@ -3,8 +3,8 @@ #ifndef _SOC_JASPERLAKE_MEMINIT_H_ #define _SOC_JASPERLAKE_MEMINIT_H_
-#include <types.h> #include <fsp/soc_binding.h> +#include <types.h>
/* Number of dq bits controlled per dqs */ #define DQ_BITS_PER_DQS 8 diff --git a/src/soc/intel/jasperlake/me.c b/src/soc/intel/jasperlake/me.c index b40b4dc..d00702e 100644 --- a/src/soc/intel/jasperlake/me.c +++ b/src/soc/intel/jasperlake/me.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h> -#include <intelblocks/cse.h> #include <console/console.h> +#include <intelblocks/cse.h> #include <soc/me.h>
static void dump_me_status(void *unused) diff --git a/src/soc/intel/jasperlake/p2sb.c b/src/soc/intel/jasperlake/p2sb.c index 169cde6..0ddd007 100644 --- a/src/soc/intel/jasperlake/p2sb.c +++ b/src/soc/intel/jasperlake/p2sb.c @@ -13,7 +13,7 @@ }
/* Remove the host accessing right to PSF register range. - * Set p2sb PCI offset EPMASK5 [29, 28, 27, 26] to disable Sideband + * Set p2sb PCI offset EPMASK5 [29, 28, 27, 26] to disable sideband * access for PCI Root Bridge. */ mask = (1 << 29) | (1 << 28) | (1 << 27) | (1 << 26); diff --git a/src/soc/intel/jasperlake/pmc.c b/src/soc/intel/jasperlake/pmc.c index ed6a31d..a3564b6 100644 --- a/src/soc/intel/jasperlake/pmc.c +++ b/src/soc/intel/jasperlake/pmc.c @@ -2,8 +2,8 @@
#include <bootstate.h> #include <console/console.h> -#include <device/mmio.h> #include <device/device.h> +#include <device/mmio.h> #include <intelblocks/pmc.h> #include <intelblocks/pmclib.h> #include <intelblocks/rtc.h> diff --git a/src/soc/intel/jasperlake/pmutil.c b/src/soc/intel/jasperlake/pmutil.c index ebe46b1..69282ee 100644 --- a/src/soc/intel/jasperlake/pmutil.c +++ b/src/soc/intel/jasperlake/pmutil.c @@ -7,15 +7,16 @@
#define __SIMPLE_DEVICE__
-#include <device/mmio.h> #include <cbmem.h> +#include <console/console.h> #include <device/device.h> +#include <device/mmio.h> #include <device/pci.h> #include <device/pci_def.h> -#include <console/console.h> #include <intelblocks/pmclib.h> #include <intelblocks/rtc.h> #include <intelblocks/tco.h> +#include <security/vboot/vbnv.h> #include <soc/espi.h> #include <soc/gpe.h> #include <soc/gpio.h> @@ -24,7 +25,6 @@ #include <soc/pm.h> #include <soc/smbus.h> #include <soc/soc_chip.h> -#include <security/vboot/vbnv.h>
/* * SMI diff --git a/src/soc/intel/jasperlake/reset.c b/src/soc/intel/jasperlake/reset.c index 1f7ea3c..fe3d769 100644 --- a/src/soc/intel/jasperlake/reset.c +++ b/src/soc/intel/jasperlake/reset.c @@ -2,9 +2,9 @@
#include <cf9_reset.h> #include <console/console.h> +#include <fsp/util.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> -#include <fsp/util.h> #include <soc/intel/common/reset.h> #include <soc/pci_devs.h>
diff --git a/src/soc/intel/jasperlake/smmrelocate.c b/src/soc/intel/jasperlake/smmrelocate.c index bbdcb68..11b631b 100644 --- a/src/soc/intel/jasperlake/smmrelocate.c +++ b/src/soc/intel/jasperlake/smmrelocate.c @@ -1,22 +1,22 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <types.h> -#include <string.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> +#include <console/console.h> +#include <cpu/intel/em64t101_save_state.h> +#include <cpu/intel/smm_reloc.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> -#include <cpu/intel/em64t101_save_state.h> -#include <cpu/intel/smm_reloc.h> -#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ops.h> #include <smp/node.h> #include <soc/cpu.h> #include <soc/msr.h> #include <soc/pci_devs.h> #include <soc/soc_chip.h> +#include <string.h> +#include <types.h>
static void update_save_state(int cpu, uintptr_t curr_smbase, uintptr_t staggered_smbase, diff --git a/src/soc/intel/jasperlake/systemagent.c b/src/soc/intel/jasperlake/systemagent.c index 080446c..73f7963 100644 --- a/src/soc/intel/jasperlake/systemagent.c +++ b/src/soc/intel/jasperlake/systemagent.c @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <device/device.h> #include <delay.h> +#include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <intelblocks/systemagent.h> #include <intelblocks/power_limit.h> +#include <intelblocks/systemagent.h> #include <soc/iomap.h> #include <soc/soc_chip.h> #include <soc/systemagent.h>
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45779 )
Change subject: soc/intel/jasperlake: Align with Elkhart Lake ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/45779/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45779/1//COMMIT_MSG@7 PS1, Line 7: soc/intel/jasperlake: Align with Elkhart Lake Same as with CB:45778, I would just write "Change cosmetics".
And in long description for example:
Reorder includes alphabetical and use standardized integer types instead of short-written.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45779 )
Change subject: soc/intel/jasperlake: Align with Elkhart Lake ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45779/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45779/1//COMMIT_MSG@7 PS1, Line 7: soc/intel/jasperlake: Align with Elkhart Lake
Same as with CB:45778, I would just write "Change cosmetics". […]
Oh, I just recognized that the short-written are still used.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45779 )
Change subject: soc/intel/jasperlake: Align with Elkhart Lake ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45779/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45779/1//COMMIT_MSG@7 PS1, Line 7: soc/intel/jasperlake: Align with Elkhart Lake
Oh, I just recognized that the short-written are still used.
I'll need to rebase this change, but the reasoning behind it is the same: improving the SNR of diff tools.
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/45779 )
Change subject: soc/intel/jasperlake: Align with Elkhart Lake ......................................................................
Abandoned
-
Angel Pons (Code Review) -
Felix Singer (Code Review)