Change in coreboot[master]: nb/amd/agesa/family14: Enable PARALLEL_MP

[Michał Kopeć (Code Review)]

Attention is currently required from: Michał Żygowski, Paul Menzel, Arthur Heymans.
Michał Kopeć has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59807 )

Change subject: nb/amd/agesa/family14: Enable PARALLEL_MP
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Patch Set 19:

(1 comment)

File src/northbridge/amd/agesa/family14/northbridge.c:

https://review.coreboot.org/c/coreboot/+/59807/comment/04105100_23dc34bb 
PS16, Line 321: uint8_t siblings = cpuid_ecx(0x80000008) & 0xff;
              : 
              : 	return siblings + 1;
> Should this change? It looks like most other AMD code does read this from the PCI config space.

Looks like only stoneyridge reads this from PCI config space, soc/amd/common/block also reads the cpu count from CPUID.