Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Maulik V Vaghela, Ronak Kanabar, Aamir Bohra, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41062
to look at the new patch set (#17).
Change subject: soc/intel/jasperlake: Apply FiVR related settings
......................................................................
soc/intel/jasperlake: Apply FiVR related settings
Set optimized values for FiVR to shut the VCCIN_AUX_SHUTDOWN
power rails during SOix.
TEST=Build and boot dedede and check VCCIN_AUX_SHUTDOWN rails
are shut.
Change-Id: Ief81fe481c94abef9754881cf1f454699fafa52e
Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com
---
M src/soc/intel/jasperlake/fsp_params.c
M src/soc/intel/jasperlake/romstage/fsp_params.c
2 files changed, 41 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/41062/17
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ief81fe481c94abef9754881cf1f454699fafa52e
Gerrit-Change-Number: 41062
Gerrit-PatchSet: 17
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