Change in ...coreboot[master]: soc/skylake: Add missing PCH IDs

[Marius Genheimer (Code Review)]

Marius Genheimer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32517

Change subject: soc/skylake: Add missing PCH IDs
......................................................................

soc/skylake: Add missing PCH IDs

Added IDs for:
- H170
- Z170
- Q170
- Q150
- B150

Used documents:
- 332690-005EN

Change-Id: If20a2b764afa02785a97948893dbc5b5f60aff60
Signed-off-by: Marius Genheimer 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/lpc/lpc.c
M src/soc/intel/skylake/bootblock/report_platform.c
3 files changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/32517/1

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 85bd6c3..6453951 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2689,6 +2689,11 @@
 #define PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE		0x9d43
 #define PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM		0x9d48
 #define PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM		0x9d46
+#define PCI_DEVICE_ID_INTEL_SPT_H_H170			0xa144
+#define PCI_DEVICE_ID_INTEL_SPT_H_Z170			0xa145
+#define PCI_DEVICE_ID_INTEL_SPT_H_Q170			0xa146
+#define PCI_DEVICE_ID_INTEL_SPT_H_Q150			0xa147
+#define PCI_DEVICE_ID_INTEL_SPT_H_B150			0xa148
 #define PCI_DEVICE_ID_INTEL_SPT_H_C236			0xa150
 #define PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM		0xa14e
 #define PCI_DEVICE_ID_INTEL_SPT_H_H110			0xa143
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index d5f76f3..43b3522 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -127,6 +127,11 @@
    PCI_DEVICE_ID_INTEL_SPT_H_C236,
    PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM,
    PCI_DEVICE_ID_INTEL_SPT_H_H110,
+	PCI_DEVICE_ID_INTEL_SPT_H_H170,
+	PCI_DEVICE_ID_INTEL_SPT_H_Z170,
+	PCI_DEVICE_ID_INTEL_SPT_H_Q170,
+	PCI_DEVICE_ID_INTEL_SPT_H_Q150,
+	PCI_DEVICE_ID_INTEL_SPT_H_B150,
    PCI_DEVICE_ID_INTEL_SPT_H_QM170,
    PCI_DEVICE_ID_INTEL_SPT_H_HM175,
    PCI_DEVICE_ID_INTEL_SPT_H_QM175,
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c
index f793435..de845c7 100644
--- a/src/soc/intel/skylake/bootblock/report_platform.c
+++ b/src/soc/intel/skylake/bootblock/report_platform.c
@@ -71,6 +71,11 @@
    { PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM, "Skylake-Y Premium" },
    { PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM, "Skylake PCH-H Premium" },
    { PCI_DEVICE_ID_INTEL_SPT_H_H110, "Skylake PCH-H H110" },
+	{ PCI_DEVICE_ID_INTEL_SPT_H_H170, "Skylake PCH-H H170" },
+	{ PCI_DEVICE_ID_INTEL_SPT_H_Z170, "Skylake PCH-H Z170" },
+	{ PCI_DEVICE_ID_INTEL_SPT_H_Q170, "Skylake PCH-H Q170" },
+	{ PCI_DEVICE_ID_INTEL_SPT_H_Q150, "Skylake PCH-H Q150" },
+	{ PCI_DEVICE_ID_INTEL_SPT_H_B150, "Skylake PCH-H B150" },
    { PCI_DEVICE_ID_INTEL_SPT_H_C236, "Skylake PCH-H C236" },
    { PCI_DEVICE_ID_INTEL_SPT_H_QM170, "Skylake PCH-H QM170" },
    { PCI_DEVICE_ID_INTEL_SPT_H_HM175, "Skylake PCH-H HM175" },

[Felix Singer (Code Review)]

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32517 )

Change subject: soc/skylake: Add missing PCH IDs
......................................................................

Patch Set 1: Code-Review+1

[Marius Genheimer (Code Review)]

Hello Patrick Rudolph, Felix Singer, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32517

to look at the new patch set (#2).

Change subject: soc/skylake: Add missing PCH IDs
......................................................................

soc/skylake: Add missing PCH IDs

Added IDs for:
- H170
- Z170
- Q170
- Q150
- B150

Used documents:
- 332690-005EN

Tested on Gigabyte GA-Z170N-WIFI

Change-Id: If20a2b764afa02785a97948893dbc5b5f60aff60
Signed-off-by: Marius Genheimer 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/lpc/lpc.c
M src/soc/intel/skylake/bootblock/report_platform.c
3 files changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/32517/2

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32517 )

Change subject: soc/skylake: Add missing PCH IDs
......................................................................

Patch Set 2: Code-Review+2

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32517 )

Change subject: soc/skylake: Add missing PCH IDs
......................................................................

Patch Set 2: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32517 )

Change subject: soc/skylake: Add missing PCH IDs
......................................................................

soc/skylake: Add missing PCH IDs

Added IDs for:
- H170
- Z170
- Q170
- Q150
- B150

Used documents:
- 332690-005EN

Tested on Gigabyte GA-Z170N-WIFI

Change-Id: If20a2b764afa02785a97948893dbc5b5f60aff60
Signed-off-by: Marius Genheimer 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32517
Reviewed-by: Patrick Rudolph 
Reviewed-by: Angel Pons 
Reviewed-by: Felix Singer 
Tested-by: build bot (Jenkins) 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/lpc/lpc.c
M src/soc/intel/skylake/bootblock/report_platform.c
3 files changed, 15 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Rudolph: Looks good to me, approved
  Felix Singer: Looks good to me, but someone else must approve
  Angel Pons: Looks good to me, approved

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 85bd6c3..6453951 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2689,6 +2689,11 @@
 #define PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE		0x9d43
 #define PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM		0x9d48
 #define PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM		0x9d46
+#define PCI_DEVICE_ID_INTEL_SPT_H_H170			0xa144
+#define PCI_DEVICE_ID_INTEL_SPT_H_Z170			0xa145
+#define PCI_DEVICE_ID_INTEL_SPT_H_Q170			0xa146
+#define PCI_DEVICE_ID_INTEL_SPT_H_Q150			0xa147
+#define PCI_DEVICE_ID_INTEL_SPT_H_B150			0xa148
 #define PCI_DEVICE_ID_INTEL_SPT_H_C236			0xa150
 #define PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM		0xa14e
 #define PCI_DEVICE_ID_INTEL_SPT_H_H110			0xa143
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index d5f76f3..43b3522 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -127,6 +127,11 @@
    PCI_DEVICE_ID_INTEL_SPT_H_C236,
    PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM,
    PCI_DEVICE_ID_INTEL_SPT_H_H110,
+	PCI_DEVICE_ID_INTEL_SPT_H_H170,
+	PCI_DEVICE_ID_INTEL_SPT_H_Z170,
+	PCI_DEVICE_ID_INTEL_SPT_H_Q170,
+	PCI_DEVICE_ID_INTEL_SPT_H_Q150,
+	PCI_DEVICE_ID_INTEL_SPT_H_B150,
    PCI_DEVICE_ID_INTEL_SPT_H_QM170,
    PCI_DEVICE_ID_INTEL_SPT_H_HM175,
    PCI_DEVICE_ID_INTEL_SPT_H_QM175,
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c
index f793435..de845c7 100644
--- a/src/soc/intel/skylake/bootblock/report_platform.c
+++ b/src/soc/intel/skylake/bootblock/report_platform.c
@@ -71,6 +71,11 @@
    { PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM, "Skylake-Y Premium" },
    { PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM, "Skylake PCH-H Premium" },
    { PCI_DEVICE_ID_INTEL_SPT_H_H110, "Skylake PCH-H H110" },
+	{ PCI_DEVICE_ID_INTEL_SPT_H_H170, "Skylake PCH-H H170" },
+	{ PCI_DEVICE_ID_INTEL_SPT_H_Z170, "Skylake PCH-H Z170" },
+	{ PCI_DEVICE_ID_INTEL_SPT_H_Q170, "Skylake PCH-H Q170" },
+	{ PCI_DEVICE_ID_INTEL_SPT_H_Q150, "Skylake PCH-H Q150" },
+	{ PCI_DEVICE_ID_INTEL_SPT_H_B150, "Skylake PCH-H B150" },
    { PCI_DEVICE_ID_INTEL_SPT_H_C236, "Skylake PCH-H C236" },
    { PCI_DEVICE_ID_INTEL_SPT_H_QM170, "Skylake PCH-H QM170" },
    { PCI_DEVICE_ID_INTEL_SPT_H_HM175, "Skylake PCH-H HM175" },