[S] Change in coreboot[master]: mb/google/brya: enable PCIe RP12 for lisbon eMMC support

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68167 )

Change subject: mb/google/brya: enable PCIe RP12 for lisbon eMMC support
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mb/google/brya: enable PCIe RP12 for lisbon eMMC support

BUG=b:246657849
TEST=FW_NAME=lisbon emerge-brask coreboot

Signed-off-by: Kevin Chiu 
Change-Id: Ief8ca9cf845156ac761556d0eb49edb65894c001
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68167
Tested-by: build bot (Jenkins) 
Reviewed-by: Ricky Chang 
Reviewed-by: Nick Vaccaro 
---
M src/mainboard/google/brya/variants/lisbon/overridetree.cb
1 file changed, 25 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nick Vaccaro: Looks good to me, approved
  Ricky Chang: Looks good to me, but someone else must approve

diff --git a/src/mainboard/google/brya/variants/lisbon/overridetree.cb b/src/mainboard/google/brya/variants/lisbon/overridetree.cb
index a2a4043..67b0d9b 100644
--- a/src/mainboard/google/brya/variants/lisbon/overridetree.cb
+++ b/src/mainboard/google/brya/variants/lisbon/overridetree.cb
@@ -200,6 +200,14 @@
    			device generic 0 on end
    		end
    	end	#PCIE8 SD card
+		device ref pcie_rp12 on
+			# Enable PCIE eMMC bridge 12 using clk 4
+			register "pch_pcie_rp[PCH_RP(12)]" = "{
+				.clk_src = 4,
+				.clk_req = 4,
+				.flags = PCIE_RP_HOTPLUG | PCIE_RP_AER,
+			}"
+		end     #PCIE12 EMMC
    	device ref gspi1 off end
    	device ref pch_espi on
    		chip ec/google/chromeec