Change in coreboot[master]: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45813 )
Change subject: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration ......................................................................
soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration
This prototype will be used outside of soc/amd.
Change-Id: Icc69cf8a910764b27edf64f0f527b8f6a9013121 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/include/cpu/x86/smm.h M src/soc/amd/picasso/include/soc/smi.h M src/soc/amd/picasso/smi_util.c M src/soc/amd/stoneyridge/include/soc/smi.h M src/soc/amd/stoneyridge/smi_util.c 5 files changed, 5 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/45813/1
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 1073d03..6cf6f82 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -197,5 +197,8 @@ /* Return the SMM save state revision. The revision can be fetched from the smm savestate which is always at the same offset downward from the top of the save state. */ uint32_t smm_revision(void); +/* Returns the PM ACPI SMI port. On Intel systems this typically not configurable (APM_CNT, 0xb2). + On AMD systems it is sometimes configurable. */ +uint16_t pm_acpi_smi_cmd_port(void);
#endif /* CPU_X86_SMM_H */ diff --git a/src/soc/amd/picasso/include/soc/smi.h b/src/soc/amd/picasso/include/soc/smi.h index a629fc5..ee47676 100644 --- a/src/soc/amd/picasso/include/soc/smi.h +++ b/src/soc/amd/picasso/include/soc/smi.h @@ -213,7 +213,6 @@ uint8_t level; /* Edge or Level, smi_sci_dir */ };
-uint16_t pm_acpi_smi_cmd_port(void); void configure_smi(uint8_t smi_num, uint8_t mode); void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); void configure_scimap(const struct sci_source *sci); diff --git a/src/soc/amd/picasso/smi_util.c b/src/soc/amd/picasso/smi_util.c index 2c5085b..2fbc8e2 100644 --- a/src/soc/amd/picasso/smi_util.c +++ b/src/soc/amd/picasso/smi_util.c @@ -5,6 +5,7 @@ */
#include <console/console.h> +#include <cpu/x86/smm.h> #include <soc/southbridge.h> #include <soc/smi.h> #include <amdblocks/acpimmio.h> diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h index f7cacea..15bba0f 100644 --- a/src/soc/amd/stoneyridge/include/soc/smi.h +++ b/src/soc/amd/stoneyridge/include/soc/smi.h @@ -211,7 +211,6 @@ uint8_t level; /* Edge or Level, smi_sci_dir */ };
-uint16_t pm_acpi_smi_cmd_port(void); void configure_smi(uint8_t smi_num, uint8_t mode); void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); void configure_scimap(const struct sci_source *sci); diff --git a/src/soc/amd/stoneyridge/smi_util.c b/src/soc/amd/stoneyridge/smi_util.c index 2c5085b..2fbc8e2 100644 --- a/src/soc/amd/stoneyridge/smi_util.c +++ b/src/soc/amd/stoneyridge/smi_util.c @@ -5,6 +5,7 @@ */
#include <console/console.h> +#include <cpu/x86/smm.h> #include <soc/southbridge.h> #include <soc/smi.h> #include <amdblocks/acpimmio.h>
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45813 )
Change subject: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45813/1/src/include/cpu/x86/smm.h File src/include/cpu/x86/smm.h:
https://review.coreboot.org/c/coreboot/+/45813/1/src/include/cpu/x86/smm.h@2... PS1, Line 200: /* Returns the PM ACPI SMI port. On Intel systems this typically not configurable (APM_CNT, 0xb2). line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45813 )
Change subject: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45813/2/src/include/cpu/x86/smm.h File src/include/cpu/x86/smm.h:
https://review.coreboot.org/c/coreboot/+/45813/2/src/include/cpu/x86/smm.h@2... PS2, Line 200: /* Returns the PM ACPI SMI port. On Intel systems this typically not configurable (APM_CNT, 0xb2). line over 96 characters
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45813
to look at the new patch set (#3).
Change subject: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration ......................................................................
soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration
This prototype will be used outside of soc/amd.
Change-Id: Icc69cf8a910764b27edf64f0f527b8f6a9013121 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/include/cpu/x86/smm.h M src/soc/amd/picasso/include/soc/smi.h M src/soc/amd/picasso/smi_util.c M src/soc/amd/stoneyridge/include/soc/smi.h M src/soc/amd/stoneyridge/smi_util.c 5 files changed, 5 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/45813/3
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45813 )
Change subject: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45813/3/src/include/cpu/x86/smm.h File src/include/cpu/x86/smm.h:
https://review.coreboot.org/c/coreboot/+/45813/3/src/include/cpu/x86/smm.h@2... PS3, Line 200: /* Returns the PM ACPI SMI port. On Intel systems this typically not configurable (APM_CNT, 0xb2). line over 96 characters
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45813
to look at the new patch set (#4).
Change subject: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration ......................................................................
soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration
This prototype will be used outside of soc/amd.
Change-Id: Icc69cf8a910764b27edf64f0f527b8f6a9013121 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/include/cpu/x86/smm.h M src/soc/amd/picasso/include/soc/smi.h M src/soc/amd/picasso/smi_util.c M src/soc/amd/stoneyridge/include/soc/smi.h M src/soc/amd/stoneyridge/smi_util.c 5 files changed, 5 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/45813/4
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45813 )
Change subject: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45813/4/src/include/cpu/x86/smm.h File src/include/cpu/x86/smm.h:
https://review.coreboot.org/c/coreboot/+/45813/4/src/include/cpu/x86/smm.h@2... PS4, Line 200: /* Returns the PM ACPI SMI port. On Intel systems this typically not configurable (APM_CNT, 0xb2). line over 96 characters
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45813 )
Change subject: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45813 )
Change subject: soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration ......................................................................
soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration
This prototype will be used outside of soc/amd.
Change-Id: Icc69cf8a910764b27edf64f0f527b8f6a9013121 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/45813 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/cpu/x86/smm.h M src/soc/amd/picasso/include/soc/smi.h M src/soc/amd/picasso/smi_util.c M src/soc/amd/stoneyridge/include/soc/smi.h M src/soc/amd/stoneyridge/smi_util.c 5 files changed, 5 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 1073d03..6cf6f82 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -197,5 +197,8 @@ /* Return the SMM save state revision. The revision can be fetched from the smm savestate which is always at the same offset downward from the top of the save state. */ uint32_t smm_revision(void); +/* Returns the PM ACPI SMI port. On Intel systems this typically not configurable (APM_CNT, 0xb2). + On AMD systems it is sometimes configurable. */ +uint16_t pm_acpi_smi_cmd_port(void);
#endif /* CPU_X86_SMM_H */ diff --git a/src/soc/amd/picasso/include/soc/smi.h b/src/soc/amd/picasso/include/soc/smi.h index 0529ef6..6413c6a 100644 --- a/src/soc/amd/picasso/include/soc/smi.h +++ b/src/soc/amd/picasso/include/soc/smi.h @@ -214,7 +214,6 @@ uint8_t level; /* Edge or Level, smi_sci_dir */ };
-uint16_t pm_acpi_smi_cmd_port(void); void configure_smi(uint8_t smi_num, uint8_t mode); void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); void configure_scimap(const struct sci_source *sci); diff --git a/src/soc/amd/picasso/smi_util.c b/src/soc/amd/picasso/smi_util.c index 2c5085b..2fbc8e2 100644 --- a/src/soc/amd/picasso/smi_util.c +++ b/src/soc/amd/picasso/smi_util.c @@ -5,6 +5,7 @@ */
#include <console/console.h> +#include <cpu/x86/smm.h> #include <soc/southbridge.h> #include <soc/smi.h> #include <amdblocks/acpimmio.h> diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h index f7cacea..15bba0f 100644 --- a/src/soc/amd/stoneyridge/include/soc/smi.h +++ b/src/soc/amd/stoneyridge/include/soc/smi.h @@ -211,7 +211,6 @@ uint8_t level; /* Edge or Level, smi_sci_dir */ };
-uint16_t pm_acpi_smi_cmd_port(void); void configure_smi(uint8_t smi_num, uint8_t mode); void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); void configure_scimap(const struct sci_source *sci); diff --git a/src/soc/amd/stoneyridge/smi_util.c b/src/soc/amd/stoneyridge/smi_util.c index 2c5085b..2fbc8e2 100644 --- a/src/soc/amd/stoneyridge/smi_util.c +++ b/src/soc/amd/stoneyridge/smi_util.c @@ -5,6 +5,7 @@ */
#include <console/console.h> +#include <cpu/x86/smm.h> #include <soc/southbridge.h> #include <soc/smi.h> #include <amdblocks/acpimmio.h>
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Arthur Heymans (Code Review)
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Patrick Georgi (Code Review)