Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36901 )
Change subject: mb/intel/dcp847ske: Disable xHCI via devicetree ......................................................................
mb/intel/dcp847ske: Disable xHCI via devicetree
This is supported by generic PCH code now.
Change-Id: Id5d764c97e47cdb08a68d03002ebebd996769914 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/mainboard/intel/dcp847ske/devicetree.cb M src/mainboard/intel/dcp847ske/early_southbridge.c 2 files changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/36901/1
diff --git a/src/mainboard/intel/dcp847ske/devicetree.cb b/src/mainboard/intel/dcp847ske/devicetree.cb index ac152d8..6ed7c03 100644 --- a/src/mainboard/intel/dcp847ske/devicetree.cb +++ b/src/mainboard/intel/dcp847ske/devicetree.cb @@ -39,6 +39,7 @@
register "gen1_dec" = "0x00fc0a01" # SuperIO @0xa00-0xaff
+ device pci 14.0 off end # USB xHCI device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c index 53f5564..1f76db8 100644 --- a/src/mainboard/intel/dcp847ske/early_southbridge.c +++ b/src/mainboard/intel/dcp847ske/early_southbridge.c @@ -31,7 +31,7 @@ void mainboard_late_rcba_config(void) { /* Disable devices */ - RCBA32(FD) |= PCH_DISABLE_P2P | PCH_DISABLE_XHCI; + RCBA32(FD) |= PCH_DISABLE_P2P;
#if CONFIG(USE_NATIVE_RAMINIT) /* Enable Gigabit Ethernet */
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36901 )
Change subject: mb/intel/dcp847ske: Disable xHCI via devicetree ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36901 )
Change subject: mb/intel/dcp847ske: Disable xHCI via devicetree ......................................................................
mb/intel/dcp847ske: Disable xHCI via devicetree
This is supported by generic PCH code now.
Change-Id: Id5d764c97e47cdb08a68d03002ebebd996769914 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/36901 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/intel/dcp847ske/devicetree.cb M src/mainboard/intel/dcp847ske/early_southbridge.c 2 files changed, 2 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved
diff --git a/src/mainboard/intel/dcp847ske/devicetree.cb b/src/mainboard/intel/dcp847ske/devicetree.cb index ac152d8..6ed7c03 100644 --- a/src/mainboard/intel/dcp847ske/devicetree.cb +++ b/src/mainboard/intel/dcp847ske/devicetree.cb @@ -39,6 +39,7 @@
register "gen1_dec" = "0x00fc0a01" # SuperIO @0xa00-0xaff
+ device pci 14.0 off end # USB xHCI device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c index 53f5564..1f76db8 100644 --- a/src/mainboard/intel/dcp847ske/early_southbridge.c +++ b/src/mainboard/intel/dcp847ske/early_southbridge.c @@ -31,7 +31,7 @@ void mainboard_late_rcba_config(void) { /* Disable devices */ - RCBA32(FD) |= PCH_DISABLE_P2P | PCH_DISABLE_XHCI; + RCBA32(FD) |= PCH_DISABLE_P2P;
#if CONFIG(USE_NATIVE_RAMINIT) /* Enable Gigabit Ethernet */
-
Arthur Heymans (Code Review) -
Nico Huber (Code Review)
-
Patrick Georgi (Code Review)