Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21084
Change subject: drivers/intel/fsp2_0: Link Post PCI enumeration Notify with BS_DEV_ENABLE ......................................................................
drivers/intel/fsp2_0: Link Post PCI enumeration Notify with BS_DEV_ENABLE
Moving NotifyPhase() - Post PCI enumeration in order to meet correct execution dependency order in lock down recommendation.
BS_DEV_ENUMERATE - BS_ON_EXIT - MRC Cache Update BS_DEV_RESOURCES - BS_ON_EXIT - Platform Lock Down after PCI enumeration BS_DEV_ENABLE - BS_ON_ENTRY - NotifyPhase() post PCI enumeration
TEST=Build and boot EVE, Poppy and Reef.
Change-Id: I4cb4eac5256c1ce98f51adad0be6e69f7d05d8e1 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/drivers/intel/fsp2_0/notify.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/21084/1
diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c index 63ad37a..34a4262 100644 --- a/src/drivers/intel/fsp2_0/notify.c +++ b/src/drivers/intel/fsp2_0/notify.c @@ -80,7 +80,7 @@ fsp_notify(END_OF_FIRMWARE); }
-BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, fsp_notify_dummy, +BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fsp_notify_dummy, (void *) AFTER_PCI_ENUM); BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, fsp_notify_dummy, (void *) READY_TO_BOOT);