Change in coreboot[master]: soc/intel/elkhartlake: Update FSP-S UPD LPSS related configs

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Maulik V Vaghela, Mario Scheithauer, Subrata Banik, Werner Zeh, Patrick Rudolph.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54959 )

Change subject: soc/intel/elkhartlake: Update FSP-S UPD LPSS related configs
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Patch Set 7:

(2 comments)

File src/soc/intel/elkhartlake/fsp_params.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120151):
https://review.coreboot.org/c/coreboot/+/54959/comment/40f11312_1d47162c 
PS7, Line 104: 	params->SerialIoUartRxPinMuxPolicy[0] = 0x2B01020C;		//GPIO pin mux for GPP_T12
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120151):
https://review.coreboot.org/c/coreboot/+/54959/comment/52105e8e_88a8816e 
PS7, Line 105: 	params->SerialIoUartTxPinMuxPolicy[0] = 0x2B01120D;		//GPIO pin mux for GPP_T13
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