Hello Patrick Rudolph, Aaron Durbin, Piotr Król, Paul Menzel, build bot (Jenkins), Hannah Williams, Michał Żygowski, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29284
to look at the new patch set (#6).
Change subject: soc/intel/braswell/chip.c: Configure LPSS devices in correct mode ......................................................................
soc/intel/braswell/chip.c: Configure LPSS devices in correct mode
LPSS devices can be configured in ACPI or PCI mode. The correct mode must be reported to FSP. Use config structure to report the correct mode.
Values for LPSS can be PCI or ACPI. The child devices need to operate in ACPI mode when the LPSS is operating in ACPI mode. FSP checks ACPI mode and changes the device mode. Supplying incorrect configuration will be corrected by FSP, but to be futher proof supply correct configuration to FSP.
BUG=N/A TEST=Intel Cherry Hill
Change-Id: Ie271d8cb9f30f0c0ba538f1530cfb82f1306fea8 Signed-off-by: Frans Hendriks fhendriks@eltan.com --- M src/soc/intel/braswell/chip.c 1 file changed, 23 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/29284/6