Change in coreboot[master]: siemens/mc_apl4: Remove reduced clock rate for I2C0

[Mario Scheithauer (Code Review)]

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/29558

Change subject: siemens/mc_apl4: Remove reduced clock rate for I2C0
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siemens/mc_apl4: Remove reduced clock rate for I2C0

There is no device on I2C0 which requires a lower clock rate.

Change-Id: Ib7c4e3251545b2d32368dd56206e3b4844a24800
Signed-off-by: Mario Scheithauer 
---
M src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
1 file changed, 0 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/29558/1

diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
index a2a2ba1..8c219af 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
@@ -47,18 +47,6 @@
    # 0:HS400(Default), 1:HS200, 2:DDR50
    register "emmc_host_max_speed" = "2"

-	# Intel Common SoC Config
-	#+-------------------+---------------------------+
-	#| Field             |  Value                    |
-	#+-------------------+---------------------------+
-	#| I2C0              | Proximity Sensor          |
-	#+-------------------+---------------------------+
-	register "common_soc_config" = "{
-		.i2c[0] = {
-			.speed = I2C_SPEED_STANDARD
-		},
-	}"
-
    device domain 0 on
    	device pci 00.0 on  end	# - Host Bridge
    	device pci 00.1 off end	# - DPTF