Change in coreboot[master]: soc/amd/stoneyridge/southbridge: make sb_disable_4dw_burst static
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48431 )
Change subject: soc/amd/stoneyridge/southbridge: make sb_disable_4dw_burst static ......................................................................
soc/amd/stoneyridge/southbridge: make sb_disable_4dw_burst static
sb_disable_4dw_burst is only used in the same compilation unit, so no need to make it externally visible.
Change-Id: I6c7c96f67b98fb8ed808f45a7685c4d72a10d32c Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/stoneyridge/include/soc/southbridge.h M src/soc/amd/stoneyridge/southbridge.c 2 files changed, 1 insertion(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/48431/1
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index d346197..e0ffd61 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -248,7 +248,6 @@
void enable_aoac_devices(void); void sb_clk_output_48Mhz(u32 osc); -void sb_disable_4dw_burst(void); void sb_enable(struct device *dev); void southbridge_final(void *chip_info); void southbridge_init(void *chip_info); diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 7661607..8815702 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -255,7 +255,7 @@ spi_write16(SPI100_ENABLE, SPI_USE_SPI100); }
-void sb_disable_4dw_burst(void) +static void sb_disable_4dw_burst(void) { spi_write16(SPI100_HOST_PREF_CONFIG, spi_read16(SPI100_HOST_PREF_CONFIG) & ~SPI_RD4DW_EN_HOST);
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48431 )
Change subject: soc/amd/stoneyridge/southbridge: make sb_disable_4dw_burst static ......................................................................
Patch Set 1: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48431 )
Change subject: soc/amd/stoneyridge/southbridge: make sb_disable_4dw_burst static ......................................................................
soc/amd/stoneyridge/southbridge: make sb_disable_4dw_burst static
sb_disable_4dw_burst is only used in the same compilation unit, so no need to make it externally visible.
Change-Id: I6c7c96f67b98fb8ed808f45a7685c4d72a10d32c Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/48431 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/soc/amd/stoneyridge/include/soc/southbridge.h M src/soc/amd/stoneyridge/southbridge.c 2 files changed, 1 insertion(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index d346197..e0ffd61 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -248,7 +248,6 @@
void enable_aoac_devices(void); void sb_clk_output_48Mhz(u32 osc); -void sb_disable_4dw_burst(void); void sb_enable(struct device *dev); void southbridge_final(void *chip_info); void southbridge_init(void *chip_info); diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 7661607..8815702 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -255,7 +255,7 @@ spi_write16(SPI100_ENABLE, SPI_USE_SPI100); }
-void sb_disable_4dw_burst(void) +static void sb_disable_4dw_burst(void) { spi_write16(SPI100_HOST_PREF_CONFIG, spi_read16(SPI100_HOST_PREF_CONFIG) & ~SPI_RD4DW_EN_HOST);
-
Felix Held (Code Review) -
Marshall Dawson (Code Review)