[S] Change in coreboot[main]: cpu/intel/model_206ax: Program Ivy Bridge defaults for MSR_PKGC_IRTL

[Patrick Rudolph (Code Review)]

Attention is currently required from: Paul Menzel.

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78609?usp=email )

Change subject: cpu/intel/model_206ax: Program Ivy Bridge defaults for MSR_PKGC_IRTL
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Patch Set 6:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/78609/comment/20fdf64d_69fc99cb :
PS6, Line 12: Test: Lenovo X220 still boots.
> Can it somehow be checked, if the correct latencies were programmed, and if they make a difference?

It should stay in deeper C-states longer as before, but it's hard to tell if it really does as there are so many things having an influence on the actual time spend in a C-state.