Change in coreboot[master]: mb/google/bry/anahera{4es}: disable TCSS port1

[Chen Wisley (Code Review)]

Attention is currently required from: Wisley Chen.
Hello Wisley Chen,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/62634

to review the following change.

Change subject: mb/google/bry/anahera{4es}: disable TCSS port1
......................................................................

mb/google/bry/anahera{4es}: disable TCSS port1

Disable unused TCSS Port1.

BUG=b:223082190
TEST=Build

Change-Id: I63f4b7d89a1e37a00c58201ecc88bb336d0932c9
Signed-off-by: Wisley Chen 
---
M src/mainboard/google/brya/variants/anahera/overridetree.cb
M src/mainboard/google/brya/variants/anahera4es/overridetree.cb
2 files changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/62634/1

diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb
index 0db917e..9934dee 100644
--- a/src/mainboard/google/brya/variants/anahera/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb
@@ -73,6 +73,7 @@
    register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"     # Type-A MLB Port
    register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"     # Smart Card
    register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
+	register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
    device domain 0 on
    	device ref igpu on
    		chip drivers/gfx/generic
@@ -139,6 +140,7 @@
    			device generic 0 on end
    		end
    	end
+		device ref tbt_pcie_rp1 off end
    	device ref cnvi_wifi on
    		chip drivers/wifi/generic
    			register "wake" = "GPE0_PME_B0"
diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
index 6136565..0d36ddf 100644
--- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
@@ -65,6 +65,7 @@
    register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"     # Type-A MLB Port
    register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"     # Smart Card
    register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
+	register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
    device domain 0 on
    	device ref igpu on
    		chip drivers/gfx/generic
@@ -131,6 +132,7 @@
    			device generic 0 on end
    		end
    	end
+		device ref tbt_pcie_rp1 off end
    	device ref cnvi_wifi on
    		chip drivers/wifi/generic
    			register "wake" = "GPE0_PME_B0"