nsekar@codeaurora.org has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29949
Change subject: mainboard/google/mistral: Add support for Mistral ......................................................................
mainboard/google/mistral: Add support for Mistral
Adding a new board variant 'Mistral' based on qcs405 soc.
TEST=build
Change-Id: I7ecfad68bb50f42acf36f51bc3433add56597c3d Signed-off-by: Sricharan R sricharan@codeaurora.org Signed-off-by: Nitheesh Sekar nsekar@codeaurora.org --- A src/mainboard/google/mistral/Kconfig A src/mainboard/google/mistral/Kconfig.name A src/mainboard/google/mistral/Makefile.inc A src/mainboard/google/mistral/board_info.txt A src/mainboard/google/mistral/bootblock.c A src/mainboard/google/mistral/chromeos.c A src/mainboard/google/mistral/chromeos.fmd A src/mainboard/google/mistral/devicetree.cb A src/mainboard/google/mistral/mainboard.c A src/mainboard/google/mistral/memlayout.ld A src/mainboard/google/mistral/romstage.c 11 files changed, 256 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/29949/1
diff --git a/src/mainboard/google/mistral/Kconfig b/src/mainboard/google/mistral/Kconfig new file mode 100644 index 0000000..f8e8ac7 --- /dev/null +++ b/src/mainboard/google/mistral/Kconfig @@ -0,0 +1,43 @@ + +config BOARD_GOOGLE_MISTRAL_COMMON # Umbrella option to be selected by variants + def_bool n + +if BOARD_GOOGLE_MISTRAL_COMMON + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_8192 + select COMMON_CBFS_SPI_WRAPPER + select SOC_QUALCOMM_QCS405 + select SPI_FLASH + select MAINBOARD_HAS_CHROMEOS + select MISSING_BOARD_RESET + +config VBOOT + select VBOOT_VBNV_FLASH + select VBOOT_MOCK_SECDATA + select VBOOT_NO_BOARD_SUPPORT + select GBB_FLAG_FORCE_DEV_SWITCH_ON + +config MAINBOARD_DIR + string + default google/mistral + +config MAINBOARD_VENDOR + string + default "Google" + +########################################################## +#### Update below when adding a new derivative board. #### +########################################################## + +config MAINBOARD_PART_NUMBER + string + default "Mistral" if BOARD_GOOGLE_MISTRAL + +config GBB_HWID + string + depends on CHROMEOS + default "MISTRAL TEST 1859" if BOARD_GOOGLE_MISTRAL + +endif # BOARD_GOOGLE_MISTRAL_COMMON diff --git a/src/mainboard/google/mistral/Kconfig.name b/src/mainboard/google/mistral/Kconfig.name new file mode 100644 index 0000000..ca51fa2 --- /dev/null +++ b/src/mainboard/google/mistral/Kconfig.name @@ -0,0 +1,4 @@ + +config BOARD_GOOGLE_MISTRAL + bool "Mistral" + select BOARD_GOOGLE_MISTRAL_COMMON diff --git a/src/mainboard/google/mistral/Makefile.inc b/src/mainboard/google/mistral/Makefile.inc new file mode 100644 index 0000000..0e2f6bd --- /dev/null +++ b/src/mainboard/google/mistral/Makefile.inc @@ -0,0 +1,15 @@ + +bootblock-y += memlayout.ld +bootblock-y += chromeos.c +bootblock-y += bootblock.c + +verstage-y += memlayout.ld +verstage-y += chromeos.c + +romstage-y += memlayout.ld +romstage-y += chromeos.c +romstage-y += romstage.c + +ramstage-y += memlayout.ld +ramstage-y += chromeos.c +ramstage-y += mainboard.c diff --git a/src/mainboard/google/mistral/board_info.txt b/src/mainboard/google/mistral/board_info.txt new file mode 100644 index 0000000..5ef77d7 --- /dev/null +++ b/src/mainboard/google/mistral/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Mistral Qualcomm QCS405 reference board +Category: eval +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/google/mistral/bootblock.c b/src/mainboard/google/mistral/bootblock.c new file mode 100644 index 0000000..6718d52 --- /dev/null +++ b/src/mainboard/google/mistral/bootblock.c @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <timestamp.h> + +void bootblock_mainboard_init(void) +{ + +} diff --git a/src/mainboard/google/mistral/chromeos.c b/src/mainboard/google/mistral/chromeos.c new file mode 100644 index 0000000..538e46f --- /dev/null +++ b/src/mainboard/google/mistral/chromeos.c @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <boot/coreboot_tables.h> + +void fill_lb_gpios(struct lb_gpios *gpios) +{ + +} diff --git a/src/mainboard/google/mistral/chromeos.fmd b/src/mainboard/google/mistral/chromeos.fmd new file mode 100644 index 0000000..e8b9978 --- /dev/null +++ b/src/mainboard/google/mistral/chromeos.fmd @@ -0,0 +1,52 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2018, The Linux Foundation. All rights reserved. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License version 2 and +## only version 2 as published by the Free Software Foundation. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +FLASH@0x0 0x800000 { + WP_RO@0x0 0x300000 { + RO_SECTION@0x0 0x2FE000 { + BOOTBLOCK@0 248K + COREBOOT(CBFS)@0x3E000 0x1E0000 + FMAP@0x21E000 0x1000 + GBB@0x21F000 0xDEF00 + RO_FRID@0x2FDF00 0x100 + } + RO_VPD@0x2FE000 0x2000 + } + + RW_NVRAM@0x300000 0x8000 + RW_ELOG@0x308000 0x8000 + RW_VPD@0x310000 0x8000 + RW_CDT@0x318000 0x8000 + + RW_SECTION_A@0x320000 0x268000 { + VBLOCK_A@0x0 0x2000 + FW_MAIN_A(CBFS)@0x2000 0x1E1F00 + RW_FWID_A@0x1E3F00 0x100 + RW_DDR_TRAINING_A@0x1E4000 0x4000 + RW_XBL_BUFFER_A@0x1E8000 0x4000 + } + + RW_SHARED@0x588000 0x10000 { + SHARED_DATA@0x0 0x10000 + } + + RW_SECTION_B@0x598000 0x268000 { + VBLOCK_B@0x0 0x2000 + FW_MAIN_B(CBFS)@0x2000 0x1E1F00 + RW_FWID_B@0x1E3F00 0x100 + RW_DDR_TRAINING_B@0x1E4000 0x4000 + RW_XBL_BUFFER_B@0x1E8000 0x4000 + } +} diff --git a/src/mainboard/google/mistral/devicetree.cb b/src/mainboard/google/mistral/devicetree.cb new file mode 100644 index 0000000..977f4c6 --- /dev/null +++ b/src/mainboard/google/mistral/devicetree.cb @@ -0,0 +1,18 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2018, The Linux Foundation. All rights reserved. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License version 2 and +## only version 2 as published by the Free Software Foundation. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +chip soc/qualcomm/qcs405 + device cpu_cluster 0 on end +end diff --git a/src/mainboard/google/mistral/mainboard.c b/src/mainboard/google/mistral/mainboard.c new file mode 100644 index 0000000..c249a32 --- /dev/null +++ b/src/mainboard/google/mistral/mainboard.c @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <device/device.h> +#include <bootblock_common.h> +#include <timestamp.h> + +static void mainboard_init(device_t dev) +{ + +} + +static void mainboard_enable(device_t dev) +{ + dev->ops->init = &mainboard_init; +} + +struct chip_operations mainboard_ops = { + .name = CONFIG_MAINBOARD_PART_NUMBER, + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/google/mistral/memlayout.ld b/src/mainboard/google/mistral/memlayout.ld new file mode 100644 index 0000000..cbc50e2 --- /dev/null +++ b/src/mainboard/google/mistral/memlayout.ld @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + #include <soc/memlayout.ld> diff --git a/src/mainboard/google/mistral/romstage.c b/src/mainboard/google/mistral/romstage.c new file mode 100644 index 0000000..079e20b --- /dev/null +++ b/src/mainboard/google/mistral/romstage.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/exception.h> +#include <cbmem.h> +#include <halt.h> +#include <program_loading.h> +#include <console/console.h> +#include <timestamp.h> +#include <arch/stages.h> + +void platform_romstage_main(void) +{ +}
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