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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62387
to look at the new patch set (#2).
Change subject: util/spd_tools: Encode SDRAM min cycle time (TCKMinPs) ......................................................................
util/spd_tools: Encode SDRAM min cycle time (TCKMinPs)
ADL encodes CK cycle time as tCKMin whereas Sabrina encodes WCK cycle time. Encode tCKMin as per the respective advisories.
BUG=None TEST=Generate the SPD and ensure that tCKMin is encoded accordingly. Minimum CAS Latency time is also impacted and is encoded accordingly.
Signed-off-by: Karthikeyan Ramasubramanian kramasub@google.com Change-Id: I99ada7ead3a75befb0f934af871eecc060adcb26 --- M spd/lp5/set-1/spd-1.hex M spd/lp5/set-1/spd-2.hex M spd/lp5/set-1/spd-3.hex M util/spd_tools/src/spd_gen/lp5.go 4 files changed, 42 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/62387/2