Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/19490 )
Change subject: soc/intel/common: Add PCI configuration code for UART ......................................................................
Patch Set 3:
(4 comments)
https://review.coreboot.org/#/c/19490/1/src/soc/intel/common/block/uart/uart... File src/soc/intel/common/block/uart/uart.c:
Line 23: uint32_t clk_n_val)
You can't have this be a nop. It won't read *any* resources. It needs to ca
Ok.Revised implementation in PS#2
PS1, Line 56: /*
space after '*'
Done
PS1, Line 56: 0xa127, /* KBL-H UART0 */ : 0xa128, /* KBL-H UART1 */ : 0xa166, /* KBL-H UART2 */ : 0x5abc, /* Apollolake UART0 */ : 0x5abe, /* Apollolake UART1 */ : 0x5ac0, /* Apollolake UART2 */ : 0x5aee, /* Apollolake UART3 */ : 0x31bc, /* GLK UART0 */ : 0x31be, /* GLK UART1 */ : 0x31c0, /* GLK UART2 */ : 0x31ee, /* GLK UART3 */ : }; : : static const struct pci_
These should be put into pci_ids.h then.
Ok.Do you suggest to move it to soc/pci_ids.h or define it under common?
Line 75
seems like tabs and spaces are being mixed between .field and =
Done
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Aamir Bohra (Code Review)