Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS

[Sean Rhodes (Code Review)]

Attention is currently required from: Tim Crawford, SRIDHAR SIRICILLA, Furquan Shaikh, Paul Menzel, Rizwan Qureshi, Tim Wawrzynczak, Angel Pons, Subrata Banik, Sridhar Siricilla, Arthur Heymans, Evgeny Zinoviev, Patrick Rudolph.
Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 )

Change subject: soc/intel: Allow enable/disable ME via CMOS
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Patch Set 77:

(2 comments)

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/52800/comment/2f6e6655_63fd9f18 
PS72, Line 956: DEBUG
> should this be `BIOS_ERR` ?

Done

https://review.coreboot.org/c/coreboot/+/52800/comment/d1128ed7_223a4eaa 
PS72, Line 956: ME: Reset limit reached.
> I'd use %u for consistency with the variable's type.

Done