Attention is currently required from: Stefan Reinauer. Hello Stefan Reinauer,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/54305
to look at the new patch set (#2).
Change subject: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 chipsets ......................................................................
util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 chipsets
This patch fixes issue reported with CB:44815, where ifdtool is unable to identify Lynx Point and Alder Lake chipsets. Hence, this patch make below changes to fix this issue proper: 1. Refactor chipset name macros to identify chipets more accurately, example: CNP, ICP and JSL chipsets macros are not seperated with proper naming. 2. Use offset FLMAP1 bit 24:31, called PSL (PCH Strap Lenth) to uniquely identify the chipsets without any additional logic. Note: The same offset was known as ISL in IFDv1 hence, used the backward compatibility without additional complexity. +---------+-----------+ | Chipset | PSL Value | +---------+-----------+ | APL/GLK | 0x13 | +---------+-----------+ | JSL | 0x2a | +---------+-----------+ | CNP | 0x45 | +---------+-----------+ | TGP/ADP | 0x46 | +---------+-----------+ | ICP | 0x4a | +---------+-----------+ 3. Remove unused argument 1 from guess_ich_chipset() function.
BUG=b:153888802 TEST=Able to dump FD contains correctly without specifying platform quirks on Brya Platform.
ifdtool -d coreboot.rom
Without this CL : PCH Revision: 100/200 series Sunrise Point With this CL : PCH Revision: 500 series Tiger Point/ 600 series Alder Point
Signed-off-by: Subrata Banik subrata.banik@intel.com Change-Id: I25f69ce775454409974056d8326c02e29038ec8a --- M util/ifdtool/ifdtool.c M util/ifdtool/ifdtool.h 2 files changed, 37 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/54305/2