Change in coreboot[master]: drivers/intel/fsp1_1: Drop weak function definition

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/54956 )

Change subject: drivers/intel/fsp1_1: Drop weak function definition
......................................................................

drivers/intel/fsp1_1: Drop weak function definition

The only FSP 1.1 platform is Braswell, which has a non-weak definition
for the `soc_silicon_init_params` function. This changes the resulting
BUILD_TIMELESS=1 coreboot image for Facebook fbg1701, for some reason.

Change-Id: I2a1b51cda9eb21d7af8372c16a43195a4bdd9543
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54956
Tested-by: build bot (Jenkins) 
Reviewed-by: Felix Held 
---
M src/drivers/intel/fsp1_1/ramstage.c
1 file changed, 0 insertions(+), 5 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved

diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 597e886..3ae473b 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -172,8 +172,3 @@
    SILICON_INIT_UPD *params)
 {
 }
-
-/* Initialize the UPD parameters for SiliconInit */
-__weak void soc_silicon_init_params(SILICON_INIT_UPD *params)
-{
-}